1ba3658adSJared Rossi /* 2ba3658adSJared Rossi * S/390 boot structures 3ba3658adSJared Rossi * 4ba3658adSJared Rossi * Copyright 2024 IBM Corp. 5ba3658adSJared Rossi * Author(s): Jared Rossi <jrossi@linux.ibm.com> 6ba3658adSJared Rossi * 7ba3658adSJared Rossi * This work is licensed under the terms of the GNU GPL, version 2 or (at 8ba3658adSJared Rossi * your option) any later version. See the COPYING file in the top-level 9ba3658adSJared Rossi * directory. 10ba3658adSJared Rossi */ 11ba3658adSJared Rossi 12ba3658adSJared Rossi #ifndef S390X_QIPL_H 13ba3658adSJared Rossi #define S390X_QIPL_H 14ba3658adSJared Rossi 15ba3658adSJared Rossi /* Boot Menu flags */ 16ba3658adSJared Rossi #define QIPL_FLAG_BM_OPTS_CMD 0x80 17ba3658adSJared Rossi #define QIPL_FLAG_BM_OPTS_ZIPL 0x40 18ba3658adSJared Rossi 19ba3658adSJared Rossi #define QIPL_ADDRESS 0xcc 20ba3658adSJared Rossi #define LOADPARM_LEN 8 21bb185de4SJared Rossi #define NO_LOADPARM "\0\0\0\0\0\0\0\0" 22ba3658adSJared Rossi 23ba3658adSJared Rossi /* 24ba3658adSJared Rossi * The QEMU IPL Parameters will be stored at absolute address 25ba3658adSJared Rossi * 204 (0xcc) which means it is 32-bit word aligned but not 26ba3658adSJared Rossi * double-word aligned. Placement of 64-bit data fields in this 27ba3658adSJared Rossi * area must account for their alignment needs. 28ba3658adSJared Rossi * The total size of the struct must never exceed 28 bytes. 29ba3658adSJared Rossi */ 30ba3658adSJared Rossi struct QemuIplParameters { 31ba3658adSJared Rossi uint8_t qipl_flags; 32*455e3bc3SJared Rossi uint8_t index; 33*455e3bc3SJared Rossi uint8_t reserved1[2]; 34ba3658adSJared Rossi uint64_t reserved2; 35ba3658adSJared Rossi uint32_t boot_menu_timeout; 360927875eSJared Rossi uint8_t reserved3[2]; 370927875eSJared Rossi uint16_t chain_len; 380927875eSJared Rossi uint64_t next_iplb; 39ba3658adSJared Rossi } QEMU_PACKED; 40ba3658adSJared Rossi typedef struct QemuIplParameters QemuIplParameters; 41ba3658adSJared Rossi 42ba3658adSJared Rossi struct IPLBlockPVComp { 43ba3658adSJared Rossi uint64_t tweak_pref; 44ba3658adSJared Rossi uint64_t addr; 45ba3658adSJared Rossi uint64_t size; 46ba3658adSJared Rossi } QEMU_PACKED; 47ba3658adSJared Rossi typedef struct IPLBlockPVComp IPLBlockPVComp; 48ba3658adSJared Rossi 49ba3658adSJared Rossi struct IPLBlockPV { 50ba3658adSJared Rossi uint8_t reserved18[87]; /* 0x18 */ 51ba3658adSJared Rossi uint8_t version; /* 0x6f */ 52ba3658adSJared Rossi uint32_t reserved70; /* 0x70 */ 53ba3658adSJared Rossi uint32_t num_comp; /* 0x74 */ 54ba3658adSJared Rossi uint64_t pv_header_addr; /* 0x78 */ 55ba3658adSJared Rossi uint64_t pv_header_len; /* 0x80 */ 56ba3658adSJared Rossi struct IPLBlockPVComp components[0]; 57ba3658adSJared Rossi } QEMU_PACKED; 58ba3658adSJared Rossi typedef struct IPLBlockPV IPLBlockPV; 59ba3658adSJared Rossi 60ba3658adSJared Rossi struct IplBlockCcw { 61ba3658adSJared Rossi uint8_t reserved0[85]; 62ba3658adSJared Rossi uint8_t ssid; 63ba3658adSJared Rossi uint16_t devno; 64ba3658adSJared Rossi uint8_t vm_flags; 65ba3658adSJared Rossi uint8_t reserved3[3]; 66ba3658adSJared Rossi uint32_t vm_parm_len; 67ba3658adSJared Rossi uint8_t nss_name[8]; 68ba3658adSJared Rossi uint8_t vm_parm[64]; 69ba3658adSJared Rossi uint8_t reserved4[8]; 70ba3658adSJared Rossi } QEMU_PACKED; 71ba3658adSJared Rossi typedef struct IplBlockCcw IplBlockCcw; 72ba3658adSJared Rossi 73ba3658adSJared Rossi struct IplBlockFcp { 74ba3658adSJared Rossi uint8_t reserved1[305 - 1]; 75ba3658adSJared Rossi uint8_t opt; 76ba3658adSJared Rossi uint8_t reserved2[3]; 77ba3658adSJared Rossi uint16_t reserved3; 78ba3658adSJared Rossi uint16_t devno; 79ba3658adSJared Rossi uint8_t reserved4[4]; 80ba3658adSJared Rossi uint64_t wwpn; 81ba3658adSJared Rossi uint64_t lun; 82ba3658adSJared Rossi uint32_t bootprog; 83ba3658adSJared Rossi uint8_t reserved5[12]; 84ba3658adSJared Rossi uint64_t br_lba; 85ba3658adSJared Rossi uint32_t scp_data_len; 86ba3658adSJared Rossi uint8_t reserved6[260]; 87ba3658adSJared Rossi uint8_t scp_data[0]; 88ba3658adSJared Rossi } QEMU_PACKED; 89ba3658adSJared Rossi typedef struct IplBlockFcp IplBlockFcp; 90ba3658adSJared Rossi 91ba3658adSJared Rossi struct IplBlockQemuScsi { 92ba3658adSJared Rossi uint32_t lun; 93ba3658adSJared Rossi uint16_t target; 94ba3658adSJared Rossi uint16_t channel; 95ba3658adSJared Rossi uint8_t reserved0[77]; 96ba3658adSJared Rossi uint8_t ssid; 97ba3658adSJared Rossi uint16_t devno; 98ba3658adSJared Rossi } QEMU_PACKED; 99ba3658adSJared Rossi typedef struct IplBlockQemuScsi IplBlockQemuScsi; 100ba3658adSJared Rossi 101ba3658adSJared Rossi union IplParameterBlock { 102ba3658adSJared Rossi struct { 103ba3658adSJared Rossi uint32_t len; 104ba3658adSJared Rossi uint8_t reserved0[3]; 105ba3658adSJared Rossi uint8_t version; 106ba3658adSJared Rossi uint32_t blk0_len; 107ba3658adSJared Rossi uint8_t pbt; 108ba3658adSJared Rossi uint8_t flags; 109ba3658adSJared Rossi uint16_t reserved01; 110ba3658adSJared Rossi uint8_t loadparm[LOADPARM_LEN]; 111ba3658adSJared Rossi union { 112ba3658adSJared Rossi IplBlockCcw ccw; 113ba3658adSJared Rossi IplBlockFcp fcp; 114ba3658adSJared Rossi IPLBlockPV pv; 115ba3658adSJared Rossi IplBlockQemuScsi scsi; 116ba3658adSJared Rossi }; 117ba3658adSJared Rossi } QEMU_PACKED; 118ba3658adSJared Rossi struct { 119ba3658adSJared Rossi uint8_t reserved1[110]; 120ba3658adSJared Rossi uint16_t devno; 121ba3658adSJared Rossi uint8_t reserved2[88]; 122ba3658adSJared Rossi uint8_t reserved_ext[4096 - 200]; 123ba3658adSJared Rossi } QEMU_PACKED; 124ba3658adSJared Rossi } QEMU_PACKED; 125ba3658adSJared Rossi typedef union IplParameterBlock IplParameterBlock; 126ba3658adSJared Rossi 127ba3658adSJared Rossi #endif 128