1 /* 2 * Channel subsystem structures and definitions. 3 * 4 * Copyright 2012 IBM Corp. 5 * Author(s): Cornelia Huck <cornelia.huck@de.ibm.com> 6 * 7 * This work is licensed under the terms of the GNU GPL, version 2 or (at 8 * your option) any later version. See the COPYING file in the top-level 9 * directory. 10 */ 11 12 #ifndef CSS_H 13 #define CSS_H 14 15 #include "cpu.h" 16 #include "hw/s390x/adapter.h" 17 #include "hw/s390x/s390_flic.h" 18 #include "hw/s390x/ioinst.h" 19 #include "sysemu/kvm.h" 20 21 /* Channel subsystem constants. */ 22 #define MAX_DEVNO 65535 23 #define MAX_SCHID 65535 24 #define MAX_SSID 3 25 #define MAX_CSSID 255 26 #define MAX_CHPID 255 27 28 #define MAX_ISC 7 29 30 #define MAX_CIWS 62 31 32 #define VIRTUAL_CSSID 0xfe 33 #define VIRTIO_CCW_CHPID 0 /* used by convention */ 34 35 typedef struct CIW { 36 uint8_t type; 37 uint8_t command; 38 uint16_t count; 39 } QEMU_PACKED CIW; 40 41 typedef struct SenseId { 42 /* common part */ 43 uint8_t reserved; /* always 0x'FF' */ 44 uint16_t cu_type; /* control unit type */ 45 uint8_t cu_model; /* control unit model */ 46 uint16_t dev_type; /* device type */ 47 uint8_t dev_model; /* device model */ 48 uint8_t unused; /* padding byte */ 49 /* extended part */ 50 CIW ciw[MAX_CIWS]; /* variable # of CIWs */ 51 } QEMU_PACKED SenseId; 52 53 /* Channel measurements, from linux/drivers/s390/cio/cmf.c. */ 54 typedef struct CMB { 55 uint16_t ssch_rsch_count; 56 uint16_t sample_count; 57 uint32_t device_connect_time; 58 uint32_t function_pending_time; 59 uint32_t device_disconnect_time; 60 uint32_t control_unit_queuing_time; 61 uint32_t device_active_only_time; 62 uint32_t reserved[2]; 63 } QEMU_PACKED CMB; 64 65 typedef struct CMBE { 66 uint32_t ssch_rsch_count; 67 uint32_t sample_count; 68 uint32_t device_connect_time; 69 uint32_t function_pending_time; 70 uint32_t device_disconnect_time; 71 uint32_t control_unit_queuing_time; 72 uint32_t device_active_only_time; 73 uint32_t device_busy_time; 74 uint32_t initial_command_response_time; 75 uint32_t reserved[7]; 76 } QEMU_PACKED CMBE; 77 78 typedef enum CcwDataStreamOp { 79 CDS_OP_R = 0, /* read, false when used as is_write */ 80 CDS_OP_W = 1, /* write, true when used as is_write */ 81 CDS_OP_A = 2 /* advance, should not be used as is_write */ 82 } CcwDataStreamOp; 83 84 /* normal usage is via SuchchDev.cds instead of instantiating */ 85 typedef struct CcwDataStream { 86 #define CDS_F_IDA 0x01 87 #define CDS_F_MIDA 0x02 88 #define CDS_F_I2K 0x04 89 #define CDS_F_C64 0x08 90 #define CDS_F_FMT 0x10 /* CCW format-1 */ 91 #define CDS_F_STREAM_BROKEN 0x80 92 uint8_t flags; 93 uint8_t at_idaw; 94 uint16_t at_byte; 95 uint16_t count; 96 uint32_t cda_orig; 97 int (*op_handler)(struct CcwDataStream *cds, void *buff, int len, 98 CcwDataStreamOp op); 99 hwaddr cda; 100 } CcwDataStream; 101 102 typedef struct SubchDev SubchDev; 103 struct SubchDev { 104 /* channel-subsystem related things: */ 105 uint8_t cssid; 106 uint8_t ssid; 107 uint16_t schid; 108 uint16_t devno; 109 SCHIB curr_status; 110 uint8_t sense_data[32]; 111 hwaddr channel_prog; 112 CCW1 last_cmd; 113 bool last_cmd_valid; 114 bool ccw_fmt_1; 115 bool thinint_active; 116 uint8_t ccw_no_data_cnt; 117 uint16_t migrated_schid; /* used for missmatch detection */ 118 ORB orb; 119 CcwDataStream cds; 120 /* transport-provided data: */ 121 int (*ccw_cb) (SubchDev *, CCW1); 122 void (*disable_cb)(SubchDev *); 123 int (*do_subchannel_work) (SubchDev *); 124 SenseId id; 125 void *driver_data; 126 }; 127 128 extern const VMStateDescription vmstate_subch_dev; 129 130 /* 131 * Identify a device within the channel subsystem. 132 * Note that this can be used to identify either the subchannel or 133 * the attached I/O device, as there's always one I/O device per 134 * subchannel. 135 */ 136 typedef struct CssDevId { 137 uint8_t cssid; 138 uint8_t ssid; 139 uint16_t devid; 140 bool valid; 141 } CssDevId; 142 143 extern const PropertyInfo css_devid_propinfo; 144 145 #define DEFINE_PROP_CSS_DEV_ID(_n, _s, _f) \ 146 DEFINE_PROP(_n, _s, _f, css_devid_propinfo, CssDevId) 147 148 typedef struct IndAddr { 149 hwaddr addr; 150 uint64_t map; 151 unsigned long refcnt; 152 int32_t len; 153 QTAILQ_ENTRY(IndAddr) sibling; 154 } IndAddr; 155 156 extern const VMStateDescription vmstate_ind_addr; 157 158 #define VMSTATE_PTR_TO_IND_ADDR(_f, _s) \ 159 VMSTATE_STRUCT(_f, _s, 1, vmstate_ind_addr, IndAddr*) 160 161 IndAddr *get_indicator(hwaddr ind_addr, int len); 162 void release_indicator(AdapterInfo *adapter, IndAddr *indicator); 163 int map_indicator(AdapterInfo *adapter, IndAddr *indicator); 164 165 typedef SubchDev *(*css_subch_cb_func)(uint8_t m, uint8_t cssid, uint8_t ssid, 166 uint16_t schid); 167 int css_create_css_image(uint8_t cssid, bool default_image); 168 bool css_devno_used(uint8_t cssid, uint8_t ssid, uint16_t devno); 169 void css_subch_assign(uint8_t cssid, uint8_t ssid, uint16_t schid, 170 uint16_t devno, SubchDev *sch); 171 void css_sch_build_virtual_schib(SubchDev *sch, uint8_t chpid, uint8_t type); 172 int css_sch_build_schib(SubchDev *sch, CssDevId *dev_id); 173 unsigned int css_find_free_chpid(uint8_t cssid); 174 uint16_t css_build_subchannel_id(SubchDev *sch); 175 void copy_scsw_to_guest(SCSW *dest, const SCSW *src); 176 void css_inject_io_interrupt(SubchDev *sch); 177 void css_reset(void); 178 void css_reset_sch(SubchDev *sch); 179 void css_queue_crw(uint8_t rsc, uint8_t erc, int solicited, 180 int chain, uint16_t rsid); 181 void css_generate_sch_crws(uint8_t cssid, uint8_t ssid, uint16_t schid, 182 int hotplugged, int add); 183 void css_generate_chp_crws(uint8_t cssid, uint8_t chpid); 184 void css_generate_css_crws(uint8_t cssid); 185 void css_clear_sei_pending(void); 186 int s390_ccw_cmd_request(ORB *orb, SCSW *scsw, void *data); 187 int do_subchannel_work_virtual(SubchDev *sub); 188 int do_subchannel_work_passthrough(SubchDev *sub); 189 190 typedef enum { 191 CSS_IO_ADAPTER_VIRTIO = 0, 192 CSS_IO_ADAPTER_PCI = 1, 193 CSS_IO_ADAPTER_TYPE_NUMS, 194 } CssIoAdapterType; 195 196 void css_adapter_interrupt(CssIoAdapterType type, uint8_t isc); 197 int css_do_sic(CPUS390XState *env, uint8_t isc, uint16_t mode); 198 uint32_t css_get_adapter_id(CssIoAdapterType type, uint8_t isc); 199 void css_register_io_adapters(CssIoAdapterType type, bool swap, bool maskable, 200 uint8_t flags, Error **errp); 201 202 #ifndef CONFIG_KVM 203 #define S390_ADAPTER_SUPPRESSIBLE 0x01 204 #else 205 #define S390_ADAPTER_SUPPRESSIBLE KVM_S390_ADAPTER_SUPPRESSIBLE 206 #endif 207 208 #ifndef CONFIG_USER_ONLY 209 SubchDev *css_find_subch(uint8_t m, uint8_t cssid, uint8_t ssid, 210 uint16_t schid); 211 bool css_subch_visible(SubchDev *sch); 212 void css_conditional_io_interrupt(SubchDev *sch); 213 int css_do_stsch(SubchDev *sch, SCHIB *schib); 214 bool css_schid_final(int m, uint8_t cssid, uint8_t ssid, uint16_t schid); 215 int css_do_msch(SubchDev *sch, const SCHIB *schib); 216 int css_do_xsch(SubchDev *sch); 217 int css_do_csch(SubchDev *sch); 218 int css_do_hsch(SubchDev *sch); 219 int css_do_ssch(SubchDev *sch, ORB *orb); 220 int css_do_tsch_get_irb(SubchDev *sch, IRB *irb, int *irb_len); 221 void css_do_tsch_update_subch(SubchDev *sch); 222 int css_do_stcrw(CRW *crw); 223 void css_undo_stcrw(CRW *crw); 224 int css_do_tpi(IOIntCode *int_code, int lowcore); 225 int css_collect_chp_desc(int m, uint8_t cssid, uint8_t f_chpid, uint8_t l_chpid, 226 int rfmt, void *buf); 227 void css_do_schm(uint8_t mbk, int update, int dct, uint64_t mbo); 228 int css_enable_mcsse(void); 229 int css_enable_mss(void); 230 int css_do_rsch(SubchDev *sch); 231 int css_do_rchp(uint8_t cssid, uint8_t chpid); 232 bool css_present(uint8_t cssid); 233 #endif 234 235 extern const PropertyInfo css_devid_ro_propinfo; 236 237 #define DEFINE_PROP_CSS_DEV_ID_RO(_n, _s, _f) \ 238 DEFINE_PROP(_n, _s, _f, css_devid_ro_propinfo, CssDevId) 239 240 /** 241 * Create a subchannel for the given bus id. 242 * 243 * If @p bus_id is valid, and @p squash_mcss is true, verify that it is 244 * not already in use in the default css, and find a free devno from the 245 * default css image for it. 246 * If @p bus_id is valid, and @p squash_mcss is false, verify that it is 247 * not already in use, and find a free devno for it. 248 * If @p bus_id is not valid, and if either @p squash_mcss or @p is_virtual 249 * is true, find a free subchannel id and device number across all 250 * subchannel sets from the default css image. 251 * If @p bus_id is not valid, and if both @p squash_mcss and @p is_virtual 252 * are false, find a non-full css image and find a free subchannel id and 253 * device number across all subchannel sets from it. 254 * 255 * If either of the former actions succeed, allocate a subchannel structure, 256 * initialise it with the bus id, subchannel id and device number, register 257 * it with the CSS and return it. Otherwise return NULL. 258 * 259 * The caller becomes owner of the returned subchannel structure and 260 * is responsible for unregistering and freeing it. 261 */ 262 SubchDev *css_create_sch(CssDevId bus_id, bool is_virtual, bool squash_mcss, 263 Error **errp); 264 265 /** Turn on css migration */ 266 void css_register_vmstate(void); 267 268 269 void ccw_dstream_init(CcwDataStream *cds, CCW1 const *ccw, ORB const *orb); 270 271 static inline void ccw_dstream_rewind(CcwDataStream *cds) 272 { 273 cds->at_byte = 0; 274 cds->at_idaw = 0; 275 cds->cda = cds->cda_orig; 276 } 277 278 static inline bool ccw_dstream_good(CcwDataStream *cds) 279 { 280 return !(cds->flags & CDS_F_STREAM_BROKEN); 281 } 282 283 static inline uint16_t ccw_dstream_residual_count(CcwDataStream *cds) 284 { 285 return cds->count - cds->at_byte; 286 } 287 288 static inline uint16_t ccw_dstream_avail(CcwDataStream *cds) 289 { 290 return ccw_dstream_good(cds) ? ccw_dstream_residual_count(cds) : 0; 291 } 292 293 static inline int ccw_dstream_advance(CcwDataStream *cds, int len) 294 { 295 return cds->op_handler(cds, NULL, len, CDS_OP_A); 296 } 297 298 static inline int ccw_dstream_write_buf(CcwDataStream *cds, void *buff, int len) 299 { 300 return cds->op_handler(cds, buff, len, CDS_OP_W); 301 } 302 303 static inline int ccw_dstream_read_buf(CcwDataStream *cds, void *buff, int len) 304 { 305 return cds->op_handler(cds, buff, len, CDS_OP_R); 306 } 307 308 #define ccw_dstream_read(cds, v) ccw_dstream_read_buf((cds), &(v), sizeof(v)) 309 #define ccw_dstream_write(cds, v) ccw_dstream_write_buf((cds), &(v), sizeof(v)) 310 311 #endif 312