1 /* 2 * RX62N MCU Object 3 * 4 * Datasheet: RX62N Group, RX621 Group User's Manual: Hardware 5 * (Rev.1.40 R01UH0033EJ0140) 6 * 7 * Copyright (c) 2019 Yoshinori Sato 8 * 9 * SPDX-License-Identifier: GPL-2.0-or-later 10 * 11 * This program is free software; you can redistribute it and/or modify it 12 * under the terms and conditions of the GNU General Public License, 13 * version 2 or later, as published by the Free Software Foundation. 14 * 15 * This program is distributed in the hope it will be useful, but WITHOUT 16 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 17 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 18 * more details. 19 * 20 * You should have received a copy of the GNU General Public License along with 21 * this program. If not, see <http://www.gnu.org/licenses/>. 22 */ 23 24 #ifndef HW_RX_RX62N_MCU_H 25 #define HW_RX_RX62N_MCU_H 26 27 #include "target/rx/cpu.h" 28 #include "hw/intc/rx_icu.h" 29 #include "hw/timer/renesas_tmr.h" 30 #include "hw/timer/renesas_cmt.h" 31 #include "hw/char/renesas_sci.h" 32 #include "qemu/units.h" 33 34 #define TYPE_RX62N_MCU "rx62n-mcu" 35 #define RX62N_MCU(obj) OBJECT_CHECK(RX62NState, (obj), TYPE_RX62N_MCU) 36 37 #define TYPE_R5F562N7_MCU "r5f562n7-mcu" 38 #define TYPE_R5F562N8_MCU "r5f562n8-mcu" 39 40 #define EXT_CS_BASE 0x01000000 41 #define VECTOR_TABLE_BASE 0xffffff80 42 #define RX62N_CFLASH_BASE 0xfff80000 43 44 #define RX62N_NR_TMR 2 45 #define RX62N_NR_CMT 2 46 #define RX62N_NR_SCI 6 47 48 typedef struct RX62NState { 49 /*< private >*/ 50 DeviceState parent_obj; 51 /*< public >*/ 52 53 RXCPU cpu; 54 RXICUState icu; 55 RTMRState tmr[RX62N_NR_TMR]; 56 RCMTState cmt[RX62N_NR_CMT]; 57 RSCIState sci[RX62N_NR_SCI]; 58 59 MemoryRegion *sysmem; 60 bool kernel; 61 62 MemoryRegion iram; 63 MemoryRegion iomem1; 64 MemoryRegion d_flash; 65 MemoryRegion iomem2; 66 MemoryRegion iomem3; 67 MemoryRegion c_flash; 68 qemu_irq irq[NR_IRQS]; 69 70 /* Input Clock (XTAL) frequency */ 71 uint32_t xtal_freq_hz; 72 /* Peripheral Module Clock frequency */ 73 uint32_t pclk_freq_hz; 74 } RX62NState; 75 76 #endif 77