1 /* 2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator 3 * 4 * PAPR Virtualized Interrupt System, aka ICS/ICP aka xics 5 * 6 * Copyright (c) 2010,2011 David Gibson, IBM Corporation. 7 * 8 * Permission is hereby granted, free of charge, to any person obtaining a copy 9 * of this software and associated documentation files (the "Software"), to deal 10 * in the Software without restriction, including without limitation the rights 11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 12 * copies of the Software, and to permit persons to whom the Software is 13 * furnished to do so, subject to the following conditions: 14 * 15 * The above copyright notice and this permission notice shall be included in 16 * all copies or substantial portions of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 24 * THE SOFTWARE. 25 * 26 */ 27 28 #ifndef XICS_H 29 #define XICS_H 30 31 #include "hw/qdev.h" 32 33 #define XICS_IPI 0x2 34 #define XICS_BUID 0x1 35 #define XICS_IRQ_BASE (XICS_BUID << 12) 36 37 /* 38 * We currently only support one BUID which is our interrupt base 39 * (the kernel implementation supports more but we don't exploit 40 * that yet) 41 */ 42 typedef struct ICPStateClass ICPStateClass; 43 typedef struct ICPState ICPState; 44 typedef struct PnvICPState PnvICPState; 45 typedef struct ICSStateClass ICSStateClass; 46 typedef struct ICSState ICSState; 47 typedef struct ICSIRQState ICSIRQState; 48 typedef struct XICSFabric XICSFabric; 49 50 #define TYPE_ICP "icp" 51 #define ICP(obj) OBJECT_CHECK(ICPState, (obj), TYPE_ICP) 52 53 #define TYPE_KVM_ICP "icp-kvm" 54 #define KVM_ICP(obj) OBJECT_CHECK(ICPState, (obj), TYPE_KVM_ICP) 55 56 #define TYPE_PNV_ICP "pnv-icp" 57 #define PNV_ICP(obj) OBJECT_CHECK(PnvICPState, (obj), TYPE_PNV_ICP) 58 59 #define ICP_CLASS(klass) \ 60 OBJECT_CLASS_CHECK(ICPStateClass, (klass), TYPE_ICP) 61 #define ICP_GET_CLASS(obj) \ 62 OBJECT_GET_CLASS(ICPStateClass, (obj), TYPE_ICP) 63 64 struct ICPStateClass { 65 DeviceClass parent_class; 66 67 DeviceRealize parent_realize; 68 DeviceReset parent_reset; 69 70 void (*pre_save)(ICPState *icp); 71 int (*post_load)(ICPState *icp, int version_id); 72 void (*synchronize_state)(ICPState *icp); 73 }; 74 75 struct ICPState { 76 /*< private >*/ 77 DeviceState parent_obj; 78 /*< public >*/ 79 CPUState *cs; 80 ICSState *xirr_owner; 81 uint32_t xirr; 82 uint8_t pending_priority; 83 uint8_t mfrr; 84 qemu_irq output; 85 86 XICSFabric *xics; 87 }; 88 89 #define ICP_PROP_XICS "xics" 90 #define ICP_PROP_CPU "cpu" 91 92 struct PnvICPState { 93 ICPState parent_obj; 94 95 MemoryRegion mmio; 96 uint32_t links[3]; 97 }; 98 99 #define TYPE_ICS_BASE "ics-base" 100 #define ICS_BASE(obj) OBJECT_CHECK(ICSState, (obj), TYPE_ICS_BASE) 101 102 /* Retain ics for sPAPR for migration from existing sPAPR guests */ 103 #define TYPE_ICS_SIMPLE "ics" 104 #define ICS_SIMPLE(obj) OBJECT_CHECK(ICSState, (obj), TYPE_ICS_SIMPLE) 105 106 #define TYPE_ICS_KVM "icskvm" 107 #define ICS_KVM(obj) OBJECT_CHECK(ICSState, (obj), TYPE_ICS_KVM) 108 109 #define ICS_BASE_CLASS(klass) \ 110 OBJECT_CLASS_CHECK(ICSStateClass, (klass), TYPE_ICS_BASE) 111 #define ICS_BASE_GET_CLASS(obj) \ 112 OBJECT_GET_CLASS(ICSStateClass, (obj), TYPE_ICS_BASE) 113 114 struct ICSStateClass { 115 DeviceClass parent_class; 116 117 DeviceRealize parent_realize; 118 DeviceReset parent_reset; 119 120 void (*pre_save)(ICSState *s); 121 int (*post_load)(ICSState *s, int version_id); 122 void (*reject)(ICSState *s, uint32_t irq); 123 void (*resend)(ICSState *s); 124 void (*eoi)(ICSState *s, uint32_t irq); 125 void (*synchronize_state)(ICSState *s); 126 }; 127 128 struct ICSState { 129 /*< private >*/ 130 DeviceState parent_obj; 131 /*< public >*/ 132 uint32_t nr_irqs; 133 uint32_t offset; 134 ICSIRQState *irqs; 135 XICSFabric *xics; 136 }; 137 138 #define ICS_PROP_XICS "xics" 139 140 static inline bool ics_valid_irq(ICSState *ics, uint32_t nr) 141 { 142 return (nr >= ics->offset) && (nr < (ics->offset + ics->nr_irqs)); 143 } 144 145 struct ICSIRQState { 146 uint32_t server; 147 uint8_t priority; 148 uint8_t saved_priority; 149 #define XICS_STATUS_ASSERTED 0x1 150 #define XICS_STATUS_SENT 0x2 151 #define XICS_STATUS_REJECTED 0x4 152 #define XICS_STATUS_MASKED_PENDING 0x8 153 #define XICS_STATUS_PRESENTED 0x10 154 #define XICS_STATUS_QUEUED 0x20 155 uint8_t status; 156 /* (flags & XICS_FLAGS_IRQ_MASK) == 0 means the interrupt is not allocated */ 157 #define XICS_FLAGS_IRQ_LSI 0x1 158 #define XICS_FLAGS_IRQ_MSI 0x2 159 #define XICS_FLAGS_IRQ_MASK 0x3 160 uint8_t flags; 161 }; 162 163 struct XICSFabric { 164 Object parent; 165 }; 166 167 #define TYPE_XICS_FABRIC "xics-fabric" 168 #define XICS_FABRIC(obj) \ 169 OBJECT_CHECK(XICSFabric, (obj), TYPE_XICS_FABRIC) 170 #define XICS_FABRIC_CLASS(klass) \ 171 OBJECT_CLASS_CHECK(XICSFabricClass, (klass), TYPE_XICS_FABRIC) 172 #define XICS_FABRIC_GET_CLASS(obj) \ 173 OBJECT_GET_CLASS(XICSFabricClass, (obj), TYPE_XICS_FABRIC) 174 175 typedef struct XICSFabricClass { 176 InterfaceClass parent; 177 ICSState *(*ics_get)(XICSFabric *xi, int irq); 178 void (*ics_resend)(XICSFabric *xi); 179 ICPState *(*icp_get)(XICSFabric *xi, int server); 180 } XICSFabricClass; 181 182 ICPState *xics_icp_get(XICSFabric *xi, int server); 183 184 /* Internal XICS interfaces */ 185 void icp_set_cppr(ICPState *icp, uint8_t cppr); 186 void icp_set_mfrr(ICPState *icp, uint8_t mfrr); 187 uint32_t icp_accept(ICPState *ss); 188 uint32_t icp_ipoll(ICPState *ss, uint32_t *mfrr); 189 void icp_eoi(ICPState *icp, uint32_t xirr); 190 191 void ics_simple_write_xive(ICSState *ics, int nr, int server, 192 uint8_t priority, uint8_t saved_priority); 193 void ics_simple_set_irq(void *opaque, int srcno, int val); 194 void ics_kvm_set_irq(void *opaque, int srcno, int val); 195 196 void ics_set_irq_type(ICSState *ics, int srcno, bool lsi); 197 void icp_pic_print_info(ICPState *icp, Monitor *mon); 198 void ics_pic_print_info(ICSState *ics, Monitor *mon); 199 200 void ics_resend(ICSState *ics); 201 void icp_resend(ICPState *ss); 202 203 Object *icp_create(Object *cpu, const char *type, XICSFabric *xi, 204 Error **errp); 205 206 #endif /* XICS_H */ 207