xref: /openbmc/qemu/include/hw/ppc/spapr_xive.h (revision b097ba37)
1 /*
2  * QEMU PowerPC sPAPR XIVE interrupt controller model
3  *
4  * Copyright (c) 2017-2018, IBM Corporation.
5  *
6  * This code is licensed under the GPL version 2 or later. See the
7  * COPYING file in the top-level directory.
8  */
9 
10 #ifndef PPC_SPAPR_XIVE_H
11 #define PPC_SPAPR_XIVE_H
12 
13 #include "hw/ppc/xive.h"
14 
15 #define TYPE_SPAPR_XIVE "spapr-xive"
16 #define SPAPR_XIVE(obj) OBJECT_CHECK(SpaprXive, (obj), TYPE_SPAPR_XIVE)
17 
18 typedef struct SpaprXive {
19     XiveRouter    parent;
20 
21     /* Internal interrupt source for IPIs and virtual devices */
22     XiveSource    source;
23     hwaddr        vc_base;
24 
25     /* END ESB MMIOs */
26     XiveENDSource end_source;
27     hwaddr        end_base;
28 
29     /* DT */
30     gchar *nodename;
31 
32     /* Routing table */
33     XiveEAS       *eat;
34     uint32_t      nr_irqs;
35     XiveEND       *endt;
36     uint32_t      nr_ends;
37 
38     /* TIMA mapping address */
39     hwaddr        tm_base;
40     MemoryRegion  tm_mmio;
41 } SpaprXive;
42 
43 bool spapr_xive_irq_claim(SpaprXive *xive, uint32_t lisn, bool lsi);
44 bool spapr_xive_irq_free(SpaprXive *xive, uint32_t lisn);
45 void spapr_xive_pic_print_info(SpaprXive *xive, Monitor *mon);
46 
47 void spapr_xive_hcall_init(SpaprMachineState *spapr);
48 void spapr_dt_xive(SpaprMachineState *spapr, uint32_t nr_servers, void *fdt,
49                    uint32_t phandle);
50 void spapr_xive_set_tctx_os_cam(XiveTCTX *tctx);
51 void spapr_xive_mmio_set_enabled(SpaprXive *xive, bool enable);
52 
53 #endif /* PPC_SPAPR_XIVE_H */
54