1 /* 2 * QEMU PowerPC sPAPR XIVE interrupt controller model 3 * 4 * Copyright (c) 2017-2018, IBM Corporation. 5 * 6 * This code is licensed under the GPL version 2 or later. See the 7 * COPYING file in the top-level directory. 8 */ 9 10 #ifndef PPC_SPAPR_XIVE_H 11 #define PPC_SPAPR_XIVE_H 12 13 #include "hw/ppc/xive.h" 14 15 #define TYPE_SPAPR_XIVE "spapr-xive" 16 #define SPAPR_XIVE(obj) OBJECT_CHECK(SpaprXive, (obj), TYPE_SPAPR_XIVE) 17 18 typedef struct SpaprXive { 19 XiveRouter parent; 20 21 /* Internal interrupt source for IPIs and virtual devices */ 22 XiveSource source; 23 hwaddr vc_base; 24 25 /* END ESB MMIOs */ 26 XiveENDSource end_source; 27 hwaddr end_base; 28 29 /* DT */ 30 gchar *nodename; 31 32 /* Routing table */ 33 XiveEAS *eat; 34 uint32_t nr_irqs; 35 XiveEND *endt; 36 uint32_t nr_ends; 37 38 /* TIMA mapping address */ 39 hwaddr tm_base; 40 MemoryRegion tm_mmio; 41 42 /* KVM support */ 43 int fd; 44 void *tm_mmap; 45 } SpaprXive; 46 47 bool spapr_xive_irq_claim(SpaprXive *xive, uint32_t lisn, bool lsi); 48 bool spapr_xive_irq_free(SpaprXive *xive, uint32_t lisn); 49 void spapr_xive_pic_print_info(SpaprXive *xive, Monitor *mon); 50 51 void spapr_xive_hcall_init(SpaprMachineState *spapr); 52 void spapr_dt_xive(SpaprMachineState *spapr, uint32_t nr_servers, void *fdt, 53 uint32_t phandle); 54 void spapr_xive_set_tctx_os_cam(XiveTCTX *tctx); 55 void spapr_xive_mmio_set_enabled(SpaprXive *xive, bool enable); 56 void spapr_xive_map_mmio(SpaprXive *xive); 57 58 int spapr_xive_end_to_target(uint8_t end_blk, uint32_t end_idx, 59 uint32_t *out_server, uint8_t *out_prio); 60 61 /* 62 * KVM XIVE device helpers 63 */ 64 void kvmppc_xive_connect(SpaprXive *xive, Error **errp); 65 void kvmppc_xive_reset(SpaprXive *xive, Error **errp); 66 void kvmppc_xive_set_source_config(SpaprXive *xive, uint32_t lisn, XiveEAS *eas, 67 Error **errp); 68 void kvmppc_xive_sync_source(SpaprXive *xive, uint32_t lisn, Error **errp); 69 uint64_t kvmppc_xive_esb_rw(XiveSource *xsrc, int srcno, uint32_t offset, 70 uint64_t data, bool write); 71 void kvmppc_xive_set_queue_config(SpaprXive *xive, uint8_t end_blk, 72 uint32_t end_idx, XiveEND *end, 73 Error **errp); 74 void kvmppc_xive_get_queue_config(SpaprXive *xive, uint8_t end_blk, 75 uint32_t end_idx, XiveEND *end, 76 Error **errp); 77 78 #endif /* PPC_SPAPR_XIVE_H */ 79