xref: /openbmc/qemu/include/hw/ppc/spapr_vio.h (revision 60efffa4)
1 #ifndef HW_SPAPR_VIO_H
2 #define HW_SPAPR_VIO_H
3 
4 /*
5  * QEMU sPAPR VIO bus definitions
6  *
7  * Copyright (c) 2010 David Gibson, IBM Corporation <david@gibson.dropbear.id.au>
8  * Based on the s390 virtio bus definitions:
9  * Copyright (c) 2009 Alexander Graf <agraf@suse.de>
10  *
11  * This library is free software; you can redistribute it and/or
12  * modify it under the terms of the GNU Lesser General Public
13  * License as published by the Free Software Foundation; either
14  * version 2 of the License, or (at your option) any later version.
15  *
16  * This library is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
19  * Lesser General Public License for more details.
20  *
21  * You should have received a copy of the GNU Lesser General Public
22  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
23  */
24 
25 #include "hw/ppc/spapr.h"
26 #include "sysemu/dma.h"
27 #include "hw/irq.h"
28 #include "qom/object.h"
29 
30 #define TYPE_VIO_SPAPR_DEVICE "vio-spapr-device"
31 OBJECT_DECLARE_TYPE(SpaprVioDevice, SpaprVioDeviceClass,
32                     vio_spapr_device, VIO_SPAPR_DEVICE)
33 
34 #define TYPE_SPAPR_VIO_BUS "spapr-vio-bus"
35 typedef struct SpaprVioBus SpaprVioBus;
36 DECLARE_INSTANCE_CHECKER(SpaprVioBus, SPAPR_VIO_BUS,
37                          TYPE_SPAPR_VIO_BUS)
38 
39 #define TYPE_SPAPR_VIO_BRIDGE "spapr-vio-bridge"
40 
41 typedef struct SpaprVioCrq {
42     uint64_t qladdr;
43     uint32_t qsize;
44     uint32_t qnext;
45     int(*SendFunc)(struct SpaprVioDevice *vdev, uint8_t *crq);
46 } SpaprVioCrq;
47 
48 
49 struct SpaprVioDeviceClass {
50     DeviceClass parent_class;
51 
52     const char *dt_name, *dt_type, *dt_compatible;
53     target_ulong signal_mask;
54     uint32_t rtce_window_size;
55     void (*realize)(SpaprVioDevice *dev, Error **errp);
56     void (*reset)(SpaprVioDevice *dev);
57     int (*devnode)(SpaprVioDevice *dev, void *fdt, int node_off);
58     const char *(*get_dt_compatible)(SpaprVioDevice *dev);
59 };
60 
61 struct SpaprVioDevice {
62     DeviceState qdev;
63     uint32_t reg;
64     uint32_t irq;
65     uint64_t signal_state;
66     SpaprVioCrq crq;
67     AddressSpace as;
68     MemoryRegion mrroot;
69     MemoryRegion mrbypass;
70     SpaprTceTable *tcet;
71 };
72 
73 #define DEFINE_SPAPR_PROPERTIES(type, field)           \
74         DEFINE_PROP_UINT32("reg", type, field.reg, -1)
75 
76 struct SpaprVioBus {
77     BusState bus;
78     uint32_t next_reg;
79 };
80 
81 SpaprVioBus *spapr_vio_bus_init(void);
82 SpaprVioDevice *spapr_vio_find_by_reg(SpaprVioBus *bus, uint32_t reg);
83 void spapr_dt_vdevice(SpaprVioBus *bus, void *fdt);
84 gchar *spapr_vio_stdout_path(SpaprVioBus *bus);
85 
86 static inline void spapr_vio_irq_pulse(SpaprVioDevice *dev)
87 {
88     SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
89 
90     qemu_irq_pulse(spapr_qirq(spapr, dev->irq));
91 }
92 
93 static inline bool spapr_vio_dma_valid(SpaprVioDevice *dev, uint64_t taddr,
94                                        uint32_t size, DMADirection dir)
95 {
96     return dma_memory_valid(&dev->as, taddr, size, dir);
97 }
98 
99 static inline int spapr_vio_dma_read(SpaprVioDevice *dev, uint64_t taddr,
100                                      void *buf, uint32_t size)
101 {
102     return (dma_memory_read(&dev->as, taddr, buf, size) != 0) ?
103         H_DEST_PARM : H_SUCCESS;
104 }
105 
106 static inline int spapr_vio_dma_write(SpaprVioDevice *dev, uint64_t taddr,
107                                       const void *buf, uint32_t size)
108 {
109     return (dma_memory_write(&dev->as, taddr, buf, size) != 0) ?
110         H_DEST_PARM : H_SUCCESS;
111 }
112 
113 static inline int spapr_vio_dma_set(SpaprVioDevice *dev, uint64_t taddr,
114                                     uint8_t c, uint32_t size)
115 {
116     return (dma_memory_set(&dev->as, taddr, c, size) != 0) ?
117         H_DEST_PARM : H_SUCCESS;
118 }
119 
120 #define vio_stb(_dev, _addr, _val) (stb_dma(&(_dev)->as, (_addr), (_val)))
121 #define vio_sth(_dev, _addr, _val) (stw_be_dma(&(_dev)->as, (_addr), (_val)))
122 #define vio_stl(_dev, _addr, _val) (stl_be_dma(&(_dev)->as, (_addr), (_val)))
123 #define vio_stq(_dev, _addr, _val) (stq_be_dma(&(_dev)->as, (_addr), (_val)))
124 #define vio_ldq(_dev, _addr) (ldq_be_dma(&(_dev)->as, (_addr)))
125 
126 int spapr_vio_send_crq(SpaprVioDevice *dev, uint8_t *crq);
127 
128 SpaprVioDevice *vty_lookup(SpaprMachineState *spapr, target_ulong reg);
129 void vty_putchars(SpaprVioDevice *sdev, uint8_t *buf, int len);
130 void spapr_vty_create(SpaprVioBus *bus, Chardev *chardev);
131 void spapr_vlan_create(SpaprVioBus *bus, NICInfo *nd);
132 void spapr_vscsi_create(SpaprVioBus *bus);
133 
134 SpaprVioDevice *spapr_vty_get_default(SpaprVioBus *bus);
135 
136 extern const VMStateDescription vmstate_spapr_vio;
137 
138 #define VMSTATE_SPAPR_VIO(_f, _s) \
139     VMSTATE_STRUCT(_f, _s, 0, vmstate_spapr_vio, SpaprVioDevice)
140 
141 void spapr_vio_set_bypass(SpaprVioDevice *dev, bool bypass);
142 
143 #endif /* HW_SPAPR_VIO_H */
144