1 #if !defined(__HW_SPAPR_H__) 2 #define __HW_SPAPR_H__ 3 4 #include "sysemu/dma.h" 5 #include "hw/ppc/xics.h" 6 7 struct VIOsPAPRBus; 8 struct sPAPRPHBState; 9 struct sPAPRNVRAM; 10 11 #define HPTE64_V_HPTE_DIRTY 0x0000000000000040ULL 12 13 typedef struct sPAPREnvironment { 14 struct VIOsPAPRBus *vio_bus; 15 QLIST_HEAD(, sPAPRPHBState) phbs; 16 struct sPAPRNVRAM *nvram; 17 XICSState *icp; 18 19 hwaddr ram_limit; 20 void *htab; 21 uint32_t htab_shift; 22 hwaddr rma_size; 23 int vrma_adjust; 24 hwaddr fdt_addr, rtas_addr; 25 long rtas_size; 26 void *fdt_skel; 27 target_ulong entry_point; 28 uint32_t next_irq; 29 uint64_t rtc_offset; 30 char *cpu_model; 31 bool has_graphics; 32 33 uint32_t epow_irq; 34 Notifier epow_notifier; 35 36 /* Migration state */ 37 int htab_save_index; 38 bool htab_first_pass; 39 int htab_fd; 40 } sPAPREnvironment; 41 42 #define H_SUCCESS 0 43 #define H_BUSY 1 /* Hardware busy -- retry later */ 44 #define H_CLOSED 2 /* Resource closed */ 45 #define H_NOT_AVAILABLE 3 46 #define H_CONSTRAINED 4 /* Resource request constrained to max allowed */ 47 #define H_PARTIAL 5 48 #define H_IN_PROGRESS 14 /* Kind of like busy */ 49 #define H_PAGE_REGISTERED 15 50 #define H_PARTIAL_STORE 16 51 #define H_PENDING 17 /* returned from H_POLL_PENDING */ 52 #define H_CONTINUE 18 /* Returned from H_Join on success */ 53 #define H_LONG_BUSY_START_RANGE 9900 /* Start of long busy range */ 54 #define H_LONG_BUSY_ORDER_1_MSEC 9900 /* Long busy, hint that 1msec \ 55 is a good time to retry */ 56 #define H_LONG_BUSY_ORDER_10_MSEC 9901 /* Long busy, hint that 10msec \ 57 is a good time to retry */ 58 #define H_LONG_BUSY_ORDER_100_MSEC 9902 /* Long busy, hint that 100msec \ 59 is a good time to retry */ 60 #define H_LONG_BUSY_ORDER_1_SEC 9903 /* Long busy, hint that 1sec \ 61 is a good time to retry */ 62 #define H_LONG_BUSY_ORDER_10_SEC 9904 /* Long busy, hint that 10sec \ 63 is a good time to retry */ 64 #define H_LONG_BUSY_ORDER_100_SEC 9905 /* Long busy, hint that 100sec \ 65 is a good time to retry */ 66 #define H_LONG_BUSY_END_RANGE 9905 /* End of long busy range */ 67 #define H_HARDWARE -1 /* Hardware error */ 68 #define H_FUNCTION -2 /* Function not supported */ 69 #define H_PRIVILEGE -3 /* Caller not privileged */ 70 #define H_PARAMETER -4 /* Parameter invalid, out-of-range or conflicting */ 71 #define H_BAD_MODE -5 /* Illegal msr value */ 72 #define H_PTEG_FULL -6 /* PTEG is full */ 73 #define H_NOT_FOUND -7 /* PTE was not found" */ 74 #define H_RESERVED_DABR -8 /* DABR address is reserved by the hypervisor on this processor" */ 75 #define H_NO_MEM -9 76 #define H_AUTHORITY -10 77 #define H_PERMISSION -11 78 #define H_DROPPED -12 79 #define H_SOURCE_PARM -13 80 #define H_DEST_PARM -14 81 #define H_REMOTE_PARM -15 82 #define H_RESOURCE -16 83 #define H_ADAPTER_PARM -17 84 #define H_RH_PARM -18 85 #define H_RCQ_PARM -19 86 #define H_SCQ_PARM -20 87 #define H_EQ_PARM -21 88 #define H_RT_PARM -22 89 #define H_ST_PARM -23 90 #define H_SIGT_PARM -24 91 #define H_TOKEN_PARM -25 92 #define H_MLENGTH_PARM -27 93 #define H_MEM_PARM -28 94 #define H_MEM_ACCESS_PARM -29 95 #define H_ATTR_PARM -30 96 #define H_PORT_PARM -31 97 #define H_MCG_PARM -32 98 #define H_VL_PARM -33 99 #define H_TSIZE_PARM -34 100 #define H_TRACE_PARM -35 101 102 #define H_MASK_PARM -37 103 #define H_MCG_FULL -38 104 #define H_ALIAS_EXIST -39 105 #define H_P_COUNTER -40 106 #define H_TABLE_FULL -41 107 #define H_ALT_TABLE -42 108 #define H_MR_CONDITION -43 109 #define H_NOT_ENOUGH_RESOURCES -44 110 #define H_R_STATE -45 111 #define H_RESCINDEND -46 112 #define H_MULTI_THREADS_ACTIVE -9005 113 114 115 /* Long Busy is a condition that can be returned by the firmware 116 * when a call cannot be completed now, but the identical call 117 * should be retried later. This prevents calls blocking in the 118 * firmware for long periods of time. Annoyingly the firmware can return 119 * a range of return codes, hinting at how long we should wait before 120 * retrying. If you don't care for the hint, the macro below is a good 121 * way to check for the long_busy return codes 122 */ 123 #define H_IS_LONG_BUSY(x) ((x >= H_LONG_BUSY_START_RANGE) \ 124 && (x <= H_LONG_BUSY_END_RANGE)) 125 126 /* Flags */ 127 #define H_LARGE_PAGE (1ULL<<(63-16)) 128 #define H_EXACT (1ULL<<(63-24)) /* Use exact PTE or return H_PTEG_FULL */ 129 #define H_R_XLATE (1ULL<<(63-25)) /* include a valid logical page num in the pte if the valid bit is set */ 130 #define H_READ_4 (1ULL<<(63-26)) /* Return 4 PTEs */ 131 #define H_PAGE_STATE_CHANGE (1ULL<<(63-28)) 132 #define H_PAGE_UNUSED ((1ULL<<(63-29)) | (1ULL<<(63-30))) 133 #define H_PAGE_SET_UNUSED (H_PAGE_STATE_CHANGE | H_PAGE_UNUSED) 134 #define H_PAGE_SET_LOANED (H_PAGE_SET_UNUSED | (1ULL<<(63-31))) 135 #define H_PAGE_SET_ACTIVE H_PAGE_STATE_CHANGE 136 #define H_AVPN (1ULL<<(63-32)) /* An avpn is provided as a sanity test */ 137 #define H_ANDCOND (1ULL<<(63-33)) 138 #define H_ICACHE_INVALIDATE (1ULL<<(63-40)) /* icbi, etc. (ignored for IO pages) */ 139 #define H_ICACHE_SYNCHRONIZE (1ULL<<(63-41)) /* dcbst, icbi, etc (ignored for IO pages */ 140 #define H_ZERO_PAGE (1ULL<<(63-48)) /* zero the page before mapping (ignored for IO pages) */ 141 #define H_COPY_PAGE (1ULL<<(63-49)) 142 #define H_N (1ULL<<(63-61)) 143 #define H_PP1 (1ULL<<(63-62)) 144 #define H_PP2 (1ULL<<(63-63)) 145 146 /* VASI States */ 147 #define H_VASI_INVALID 0 148 #define H_VASI_ENABLED 1 149 #define H_VASI_ABORTED 2 150 #define H_VASI_SUSPENDING 3 151 #define H_VASI_SUSPENDED 4 152 #define H_VASI_RESUMED 5 153 #define H_VASI_COMPLETED 6 154 155 /* DABRX flags */ 156 #define H_DABRX_HYPERVISOR (1ULL<<(63-61)) 157 #define H_DABRX_KERNEL (1ULL<<(63-62)) 158 #define H_DABRX_USER (1ULL<<(63-63)) 159 160 /* Each control block has to be on a 4K boundary */ 161 #define H_CB_ALIGNMENT 4096 162 163 /* pSeries hypervisor opcodes */ 164 #define H_REMOVE 0x04 165 #define H_ENTER 0x08 166 #define H_READ 0x0c 167 #define H_CLEAR_MOD 0x10 168 #define H_CLEAR_REF 0x14 169 #define H_PROTECT 0x18 170 #define H_GET_TCE 0x1c 171 #define H_PUT_TCE 0x20 172 #define H_SET_SPRG0 0x24 173 #define H_SET_DABR 0x28 174 #define H_PAGE_INIT 0x2c 175 #define H_SET_ASR 0x30 176 #define H_ASR_ON 0x34 177 #define H_ASR_OFF 0x38 178 #define H_LOGICAL_CI_LOAD 0x3c 179 #define H_LOGICAL_CI_STORE 0x40 180 #define H_LOGICAL_CACHE_LOAD 0x44 181 #define H_LOGICAL_CACHE_STORE 0x48 182 #define H_LOGICAL_ICBI 0x4c 183 #define H_LOGICAL_DCBF 0x50 184 #define H_GET_TERM_CHAR 0x54 185 #define H_PUT_TERM_CHAR 0x58 186 #define H_REAL_TO_LOGICAL 0x5c 187 #define H_HYPERVISOR_DATA 0x60 188 #define H_EOI 0x64 189 #define H_CPPR 0x68 190 #define H_IPI 0x6c 191 #define H_IPOLL 0x70 192 #define H_XIRR 0x74 193 #define H_PERFMON 0x7c 194 #define H_MIGRATE_DMA 0x78 195 #define H_REGISTER_VPA 0xDC 196 #define H_CEDE 0xE0 197 #define H_CONFER 0xE4 198 #define H_PROD 0xE8 199 #define H_GET_PPP 0xEC 200 #define H_SET_PPP 0xF0 201 #define H_PURR 0xF4 202 #define H_PIC 0xF8 203 #define H_REG_CRQ 0xFC 204 #define H_FREE_CRQ 0x100 205 #define H_VIO_SIGNAL 0x104 206 #define H_SEND_CRQ 0x108 207 #define H_COPY_RDMA 0x110 208 #define H_REGISTER_LOGICAL_LAN 0x114 209 #define H_FREE_LOGICAL_LAN 0x118 210 #define H_ADD_LOGICAL_LAN_BUFFER 0x11C 211 #define H_SEND_LOGICAL_LAN 0x120 212 #define H_BULK_REMOVE 0x124 213 #define H_MULTICAST_CTRL 0x130 214 #define H_SET_XDABR 0x134 215 #define H_STUFF_TCE 0x138 216 #define H_PUT_TCE_INDIRECT 0x13C 217 #define H_CHANGE_LOGICAL_LAN_MAC 0x14C 218 #define H_VTERM_PARTNER_INFO 0x150 219 #define H_REGISTER_VTERM 0x154 220 #define H_FREE_VTERM 0x158 221 #define H_RESET_EVENTS 0x15C 222 #define H_ALLOC_RESOURCE 0x160 223 #define H_FREE_RESOURCE 0x164 224 #define H_MODIFY_QP 0x168 225 #define H_QUERY_QP 0x16C 226 #define H_REREGISTER_PMR 0x170 227 #define H_REGISTER_SMR 0x174 228 #define H_QUERY_MR 0x178 229 #define H_QUERY_MW 0x17C 230 #define H_QUERY_HCA 0x180 231 #define H_QUERY_PORT 0x184 232 #define H_MODIFY_PORT 0x188 233 #define H_DEFINE_AQP1 0x18C 234 #define H_GET_TRACE_BUFFER 0x190 235 #define H_DEFINE_AQP0 0x194 236 #define H_RESIZE_MR 0x198 237 #define H_ATTACH_MCQP 0x19C 238 #define H_DETACH_MCQP 0x1A0 239 #define H_CREATE_RPT 0x1A4 240 #define H_REMOVE_RPT 0x1A8 241 #define H_REGISTER_RPAGES 0x1AC 242 #define H_DISABLE_AND_GETC 0x1B0 243 #define H_ERROR_DATA 0x1B4 244 #define H_GET_HCA_INFO 0x1B8 245 #define H_GET_PERF_COUNT 0x1BC 246 #define H_MANAGE_TRACE 0x1C0 247 #define H_FREE_LOGICAL_LAN_BUFFER 0x1D4 248 #define H_QUERY_INT_STATE 0x1E4 249 #define H_POLL_PENDING 0x1D8 250 #define H_ILLAN_ATTRIBUTES 0x244 251 #define H_MODIFY_HEA_QP 0x250 252 #define H_QUERY_HEA_QP 0x254 253 #define H_QUERY_HEA 0x258 254 #define H_QUERY_HEA_PORT 0x25C 255 #define H_MODIFY_HEA_PORT 0x260 256 #define H_REG_BCMC 0x264 257 #define H_DEREG_BCMC 0x268 258 #define H_REGISTER_HEA_RPAGES 0x26C 259 #define H_DISABLE_AND_GET_HEA 0x270 260 #define H_GET_HEA_INFO 0x274 261 #define H_ALLOC_HEA_RESOURCE 0x278 262 #define H_ADD_CONN 0x284 263 #define H_DEL_CONN 0x288 264 #define H_JOIN 0x298 265 #define H_VASI_STATE 0x2A4 266 #define H_ENABLE_CRQ 0x2B0 267 #define H_GET_EM_PARMS 0x2B8 268 #define H_SET_MPP 0x2D0 269 #define H_GET_MPP 0x2D4 270 #define MAX_HCALL_OPCODE H_GET_MPP 271 272 /* The hcalls above are standardized in PAPR and implemented by pHyp 273 * as well. 274 * 275 * We also need some hcalls which are specific to qemu / KVM-on-POWER. 276 * So far we just need one for H_RTAS, but in future we'll need more 277 * for extensions like virtio. We put those into the 0xf000-0xfffc 278 * range which is reserved by PAPR for "platform-specific" hcalls. 279 */ 280 #define KVMPPC_HCALL_BASE 0xf000 281 #define KVMPPC_H_RTAS (KVMPPC_HCALL_BASE + 0x0) 282 #define KVMPPC_H_LOGICAL_MEMOP (KVMPPC_HCALL_BASE + 0x1) 283 #define KVMPPC_HCALL_MAX KVMPPC_H_LOGICAL_MEMOP 284 285 extern sPAPREnvironment *spapr; 286 287 /*#define DEBUG_SPAPR_HCALLS*/ 288 289 #ifdef DEBUG_SPAPR_HCALLS 290 #define hcall_dprintf(fmt, ...) \ 291 do { fprintf(stderr, "%s: " fmt, __func__, ## __VA_ARGS__); } while (0) 292 #else 293 #define hcall_dprintf(fmt, ...) \ 294 do { } while (0) 295 #endif 296 297 typedef target_ulong (*spapr_hcall_fn)(PowerPCCPU *cpu, sPAPREnvironment *spapr, 298 target_ulong opcode, 299 target_ulong *args); 300 301 void spapr_register_hypercall(target_ulong opcode, spapr_hcall_fn fn); 302 target_ulong spapr_hypercall(PowerPCCPU *cpu, target_ulong opcode, 303 target_ulong *args); 304 305 int spapr_allocate_irq(int hint, bool lsi); 306 int spapr_allocate_irq_block(int num, bool lsi); 307 308 static inline int spapr_allocate_msi(int hint) 309 { 310 return spapr_allocate_irq(hint, false); 311 } 312 313 static inline int spapr_allocate_lsi(int hint) 314 { 315 return spapr_allocate_irq(hint, true); 316 } 317 318 static inline uint32_t rtas_ld(target_ulong phys, int n) 319 { 320 return ldl_be_phys(phys + 4*n); 321 } 322 323 static inline void rtas_st(target_ulong phys, int n, uint32_t val) 324 { 325 stl_be_phys(phys + 4*n, val); 326 } 327 328 typedef void (*spapr_rtas_fn)(PowerPCCPU *cpu, sPAPREnvironment *spapr, 329 uint32_t token, 330 uint32_t nargs, target_ulong args, 331 uint32_t nret, target_ulong rets); 332 int spapr_rtas_register(const char *name, spapr_rtas_fn fn); 333 target_ulong spapr_rtas_call(PowerPCCPU *cpu, sPAPREnvironment *spapr, 334 uint32_t token, uint32_t nargs, target_ulong args, 335 uint32_t nret, target_ulong rets); 336 int spapr_rtas_device_tree_setup(void *fdt, hwaddr rtas_addr, 337 hwaddr rtas_size); 338 339 #define SPAPR_TCE_PAGE_SHIFT 12 340 #define SPAPR_TCE_PAGE_SIZE (1ULL << SPAPR_TCE_PAGE_SHIFT) 341 #define SPAPR_TCE_PAGE_MASK (SPAPR_TCE_PAGE_SIZE - 1) 342 343 #define SPAPR_VIO_BASE_LIOBN 0x00000000 344 #define SPAPR_PCI_BASE_LIOBN 0x80000000 345 346 #define RTAS_ERROR_LOG_MAX 2048 347 348 typedef struct sPAPRTCETable sPAPRTCETable; 349 350 #define TYPE_SPAPR_TCE_TABLE "spapr-tce-table" 351 #define SPAPR_TCE_TABLE(obj) \ 352 OBJECT_CHECK(sPAPRTCETable, (obj), TYPE_SPAPR_TCE_TABLE) 353 354 struct sPAPRTCETable { 355 DeviceState parent; 356 uint32_t liobn; 357 uint32_t window_size; 358 uint32_t nb_table; 359 uint64_t *table; 360 bool bypass; 361 int fd; 362 MemoryRegion iommu; 363 QLIST_ENTRY(sPAPRTCETable) list; 364 }; 365 366 void spapr_events_init(sPAPREnvironment *spapr); 367 void spapr_events_fdt_skel(void *fdt, uint32_t epow_irq); 368 sPAPRTCETable *spapr_tce_new_table(DeviceState *owner, uint32_t liobn, 369 size_t window_size); 370 MemoryRegion *spapr_tce_get_iommu(sPAPRTCETable *tcet); 371 void spapr_tce_set_bypass(sPAPRTCETable *tcet, bool bypass); 372 int spapr_dma_dt(void *fdt, int node_off, const char *propname, 373 uint32_t liobn, uint64_t window, uint32_t size); 374 int spapr_tcet_dma_dt(void *fdt, int node_off, const char *propname, 375 sPAPRTCETable *tcet); 376 377 #endif /* !defined (__HW_SPAPR_H__) */ 378