10d09e41aSPaolo Bonzini #if !defined(__HW_SPAPR_H__) 20d09e41aSPaolo Bonzini #define __HW_SPAPR_H__ 30d09e41aSPaolo Bonzini 40d09e41aSPaolo Bonzini #include "sysemu/dma.h" 50d09e41aSPaolo Bonzini #include "hw/ppc/xics.h" 60d09e41aSPaolo Bonzini 70d09e41aSPaolo Bonzini struct VIOsPAPRBus; 80d09e41aSPaolo Bonzini struct sPAPRPHBState; 90d09e41aSPaolo Bonzini struct sPAPRNVRAM; 100d09e41aSPaolo Bonzini 114be21d56SDavid Gibson #define HPTE64_V_HPTE_DIRTY 0x0000000000000040ULL 124be21d56SDavid Gibson 130d09e41aSPaolo Bonzini typedef struct sPAPREnvironment { 140d09e41aSPaolo Bonzini struct VIOsPAPRBus *vio_bus; 150d09e41aSPaolo Bonzini QLIST_HEAD(, sPAPRPHBState) phbs; 160d09e41aSPaolo Bonzini struct sPAPRNVRAM *nvram; 17c04d6cfaSAnthony Liguori XICSState *icp; 180d09e41aSPaolo Bonzini 190d09e41aSPaolo Bonzini hwaddr ram_limit; 200d09e41aSPaolo Bonzini void *htab; 214be21d56SDavid Gibson uint32_t htab_shift; 220d09e41aSPaolo Bonzini hwaddr rma_size; 230d09e41aSPaolo Bonzini int vrma_adjust; 240d09e41aSPaolo Bonzini hwaddr fdt_addr, rtas_addr; 25b7d1f77aSBenjamin Herrenschmidt ssize_t rtas_size; 26b7d1f77aSBenjamin Herrenschmidt void *rtas_blob; 270d09e41aSPaolo Bonzini void *fdt_skel; 280d09e41aSPaolo Bonzini target_ulong entry_point; 294be21d56SDavid Gibson uint64_t rtc_offset; 3098a8b524SAlexey Kardashevskiy struct PPCTimebase tb; 310d09e41aSPaolo Bonzini bool has_graphics; 320d09e41aSPaolo Bonzini 330d09e41aSPaolo Bonzini uint32_t epow_irq; 340d09e41aSPaolo Bonzini Notifier epow_notifier; 354be21d56SDavid Gibson 364be21d56SDavid Gibson /* Migration state */ 374be21d56SDavid Gibson int htab_save_index; 384be21d56SDavid Gibson bool htab_first_pass; 39e68cb8b4SAlexey Kardashevskiy int htab_fd; 40*01a57972SSamuel Mendoza-Jonas bool htab_fd_stale; 410d09e41aSPaolo Bonzini } sPAPREnvironment; 420d09e41aSPaolo Bonzini 430d09e41aSPaolo Bonzini #define H_SUCCESS 0 440d09e41aSPaolo Bonzini #define H_BUSY 1 /* Hardware busy -- retry later */ 450d09e41aSPaolo Bonzini #define H_CLOSED 2 /* Resource closed */ 460d09e41aSPaolo Bonzini #define H_NOT_AVAILABLE 3 470d09e41aSPaolo Bonzini #define H_CONSTRAINED 4 /* Resource request constrained to max allowed */ 480d09e41aSPaolo Bonzini #define H_PARTIAL 5 490d09e41aSPaolo Bonzini #define H_IN_PROGRESS 14 /* Kind of like busy */ 500d09e41aSPaolo Bonzini #define H_PAGE_REGISTERED 15 510d09e41aSPaolo Bonzini #define H_PARTIAL_STORE 16 520d09e41aSPaolo Bonzini #define H_PENDING 17 /* returned from H_POLL_PENDING */ 530d09e41aSPaolo Bonzini #define H_CONTINUE 18 /* Returned from H_Join on success */ 540d09e41aSPaolo Bonzini #define H_LONG_BUSY_START_RANGE 9900 /* Start of long busy range */ 550d09e41aSPaolo Bonzini #define H_LONG_BUSY_ORDER_1_MSEC 9900 /* Long busy, hint that 1msec \ 560d09e41aSPaolo Bonzini is a good time to retry */ 570d09e41aSPaolo Bonzini #define H_LONG_BUSY_ORDER_10_MSEC 9901 /* Long busy, hint that 10msec \ 580d09e41aSPaolo Bonzini is a good time to retry */ 590d09e41aSPaolo Bonzini #define H_LONG_BUSY_ORDER_100_MSEC 9902 /* Long busy, hint that 100msec \ 600d09e41aSPaolo Bonzini is a good time to retry */ 610d09e41aSPaolo Bonzini #define H_LONG_BUSY_ORDER_1_SEC 9903 /* Long busy, hint that 1sec \ 620d09e41aSPaolo Bonzini is a good time to retry */ 630d09e41aSPaolo Bonzini #define H_LONG_BUSY_ORDER_10_SEC 9904 /* Long busy, hint that 10sec \ 640d09e41aSPaolo Bonzini is a good time to retry */ 650d09e41aSPaolo Bonzini #define H_LONG_BUSY_ORDER_100_SEC 9905 /* Long busy, hint that 100sec \ 660d09e41aSPaolo Bonzini is a good time to retry */ 670d09e41aSPaolo Bonzini #define H_LONG_BUSY_END_RANGE 9905 /* End of long busy range */ 680d09e41aSPaolo Bonzini #define H_HARDWARE -1 /* Hardware error */ 690d09e41aSPaolo Bonzini #define H_FUNCTION -2 /* Function not supported */ 700d09e41aSPaolo Bonzini #define H_PRIVILEGE -3 /* Caller not privileged */ 710d09e41aSPaolo Bonzini #define H_PARAMETER -4 /* Parameter invalid, out-of-range or conflicting */ 720d09e41aSPaolo Bonzini #define H_BAD_MODE -5 /* Illegal msr value */ 730d09e41aSPaolo Bonzini #define H_PTEG_FULL -6 /* PTEG is full */ 740d09e41aSPaolo Bonzini #define H_NOT_FOUND -7 /* PTE was not found" */ 750d09e41aSPaolo Bonzini #define H_RESERVED_DABR -8 /* DABR address is reserved by the hypervisor on this processor" */ 760d09e41aSPaolo Bonzini #define H_NO_MEM -9 770d09e41aSPaolo Bonzini #define H_AUTHORITY -10 780d09e41aSPaolo Bonzini #define H_PERMISSION -11 790d09e41aSPaolo Bonzini #define H_DROPPED -12 800d09e41aSPaolo Bonzini #define H_SOURCE_PARM -13 810d09e41aSPaolo Bonzini #define H_DEST_PARM -14 820d09e41aSPaolo Bonzini #define H_REMOTE_PARM -15 830d09e41aSPaolo Bonzini #define H_RESOURCE -16 840d09e41aSPaolo Bonzini #define H_ADAPTER_PARM -17 850d09e41aSPaolo Bonzini #define H_RH_PARM -18 860d09e41aSPaolo Bonzini #define H_RCQ_PARM -19 870d09e41aSPaolo Bonzini #define H_SCQ_PARM -20 880d09e41aSPaolo Bonzini #define H_EQ_PARM -21 890d09e41aSPaolo Bonzini #define H_RT_PARM -22 900d09e41aSPaolo Bonzini #define H_ST_PARM -23 910d09e41aSPaolo Bonzini #define H_SIGT_PARM -24 920d09e41aSPaolo Bonzini #define H_TOKEN_PARM -25 930d09e41aSPaolo Bonzini #define H_MLENGTH_PARM -27 940d09e41aSPaolo Bonzini #define H_MEM_PARM -28 950d09e41aSPaolo Bonzini #define H_MEM_ACCESS_PARM -29 960d09e41aSPaolo Bonzini #define H_ATTR_PARM -30 970d09e41aSPaolo Bonzini #define H_PORT_PARM -31 980d09e41aSPaolo Bonzini #define H_MCG_PARM -32 990d09e41aSPaolo Bonzini #define H_VL_PARM -33 1000d09e41aSPaolo Bonzini #define H_TSIZE_PARM -34 1010d09e41aSPaolo Bonzini #define H_TRACE_PARM -35 1020d09e41aSPaolo Bonzini 1030d09e41aSPaolo Bonzini #define H_MASK_PARM -37 1040d09e41aSPaolo Bonzini #define H_MCG_FULL -38 1050d09e41aSPaolo Bonzini #define H_ALIAS_EXIST -39 1060d09e41aSPaolo Bonzini #define H_P_COUNTER -40 1070d09e41aSPaolo Bonzini #define H_TABLE_FULL -41 1080d09e41aSPaolo Bonzini #define H_ALT_TABLE -42 1090d09e41aSPaolo Bonzini #define H_MR_CONDITION -43 1100d09e41aSPaolo Bonzini #define H_NOT_ENOUGH_RESOURCES -44 1110d09e41aSPaolo Bonzini #define H_R_STATE -45 1120d09e41aSPaolo Bonzini #define H_RESCINDEND -46 11342561bf2SAnton Blanchard #define H_P2 -55 11442561bf2SAnton Blanchard #define H_P3 -56 11542561bf2SAnton Blanchard #define H_P4 -57 11642561bf2SAnton Blanchard #define H_P5 -58 11742561bf2SAnton Blanchard #define H_P6 -59 11842561bf2SAnton Blanchard #define H_P7 -60 11942561bf2SAnton Blanchard #define H_P8 -61 12042561bf2SAnton Blanchard #define H_P9 -62 12142561bf2SAnton Blanchard #define H_UNSUPPORTED_FLAG -256 1220d09e41aSPaolo Bonzini #define H_MULTI_THREADS_ACTIVE -9005 1230d09e41aSPaolo Bonzini 1240d09e41aSPaolo Bonzini 1250d09e41aSPaolo Bonzini /* Long Busy is a condition that can be returned by the firmware 1260d09e41aSPaolo Bonzini * when a call cannot be completed now, but the identical call 1270d09e41aSPaolo Bonzini * should be retried later. This prevents calls blocking in the 1280d09e41aSPaolo Bonzini * firmware for long periods of time. Annoyingly the firmware can return 1290d09e41aSPaolo Bonzini * a range of return codes, hinting at how long we should wait before 1300d09e41aSPaolo Bonzini * retrying. If you don't care for the hint, the macro below is a good 1310d09e41aSPaolo Bonzini * way to check for the long_busy return codes 1320d09e41aSPaolo Bonzini */ 1330d09e41aSPaolo Bonzini #define H_IS_LONG_BUSY(x) ((x >= H_LONG_BUSY_START_RANGE) \ 1340d09e41aSPaolo Bonzini && (x <= H_LONG_BUSY_END_RANGE)) 1350d09e41aSPaolo Bonzini 1360d09e41aSPaolo Bonzini /* Flags */ 1370d09e41aSPaolo Bonzini #define H_LARGE_PAGE (1ULL<<(63-16)) 1380d09e41aSPaolo Bonzini #define H_EXACT (1ULL<<(63-24)) /* Use exact PTE or return H_PTEG_FULL */ 1390d09e41aSPaolo Bonzini #define H_R_XLATE (1ULL<<(63-25)) /* include a valid logical page num in the pte if the valid bit is set */ 1400d09e41aSPaolo Bonzini #define H_READ_4 (1ULL<<(63-26)) /* Return 4 PTEs */ 1410d09e41aSPaolo Bonzini #define H_PAGE_STATE_CHANGE (1ULL<<(63-28)) 1420d09e41aSPaolo Bonzini #define H_PAGE_UNUSED ((1ULL<<(63-29)) | (1ULL<<(63-30))) 1430d09e41aSPaolo Bonzini #define H_PAGE_SET_UNUSED (H_PAGE_STATE_CHANGE | H_PAGE_UNUSED) 1440d09e41aSPaolo Bonzini #define H_PAGE_SET_LOANED (H_PAGE_SET_UNUSED | (1ULL<<(63-31))) 1450d09e41aSPaolo Bonzini #define H_PAGE_SET_ACTIVE H_PAGE_STATE_CHANGE 1460d09e41aSPaolo Bonzini #define H_AVPN (1ULL<<(63-32)) /* An avpn is provided as a sanity test */ 1470d09e41aSPaolo Bonzini #define H_ANDCOND (1ULL<<(63-33)) 1480d09e41aSPaolo Bonzini #define H_ICACHE_INVALIDATE (1ULL<<(63-40)) /* icbi, etc. (ignored for IO pages) */ 1490d09e41aSPaolo Bonzini #define H_ICACHE_SYNCHRONIZE (1ULL<<(63-41)) /* dcbst, icbi, etc (ignored for IO pages */ 1500d09e41aSPaolo Bonzini #define H_ZERO_PAGE (1ULL<<(63-48)) /* zero the page before mapping (ignored for IO pages) */ 1510d09e41aSPaolo Bonzini #define H_COPY_PAGE (1ULL<<(63-49)) 1520d09e41aSPaolo Bonzini #define H_N (1ULL<<(63-61)) 1530d09e41aSPaolo Bonzini #define H_PP1 (1ULL<<(63-62)) 1540d09e41aSPaolo Bonzini #define H_PP2 (1ULL<<(63-63)) 1550d09e41aSPaolo Bonzini 156a46622fdSAlexey Kardashevskiy /* Values for 2nd argument to H_SET_MODE */ 157a46622fdSAlexey Kardashevskiy #define H_SET_MODE_RESOURCE_SET_CIABR 1 158a46622fdSAlexey Kardashevskiy #define H_SET_MODE_RESOURCE_SET_DAWR 2 159a46622fdSAlexey Kardashevskiy #define H_SET_MODE_RESOURCE_ADDR_TRANS_MODE 3 160a46622fdSAlexey Kardashevskiy #define H_SET_MODE_RESOURCE_LE 4 161a46622fdSAlexey Kardashevskiy 162a46622fdSAlexey Kardashevskiy /* Flags for H_SET_MODE_RESOURCE_LE */ 16342561bf2SAnton Blanchard #define H_SET_MODE_ENDIAN_BIG 0 16442561bf2SAnton Blanchard #define H_SET_MODE_ENDIAN_LITTLE 1 16542561bf2SAnton Blanchard 166d5ac4f54SAlexey Kardashevskiy /* Flags for H_SET_MODE_RESOURCE_ADDR_TRANS_MODE */ 167d5ac4f54SAlexey Kardashevskiy #define H_SET_MODE_ADDR_TRANS_NONE 0 168d5ac4f54SAlexey Kardashevskiy #define H_SET_MODE_ADDR_TRANS_0001_8000 2 169d5ac4f54SAlexey Kardashevskiy #define H_SET_MODE_ADDR_TRANS_C000_0000_0000_4000 3 170d5ac4f54SAlexey Kardashevskiy 1710d09e41aSPaolo Bonzini /* VASI States */ 1720d09e41aSPaolo Bonzini #define H_VASI_INVALID 0 1730d09e41aSPaolo Bonzini #define H_VASI_ENABLED 1 1740d09e41aSPaolo Bonzini #define H_VASI_ABORTED 2 1750d09e41aSPaolo Bonzini #define H_VASI_SUSPENDING 3 1760d09e41aSPaolo Bonzini #define H_VASI_SUSPENDED 4 1770d09e41aSPaolo Bonzini #define H_VASI_RESUMED 5 1780d09e41aSPaolo Bonzini #define H_VASI_COMPLETED 6 1790d09e41aSPaolo Bonzini 1800d09e41aSPaolo Bonzini /* DABRX flags */ 1810d09e41aSPaolo Bonzini #define H_DABRX_HYPERVISOR (1ULL<<(63-61)) 1820d09e41aSPaolo Bonzini #define H_DABRX_KERNEL (1ULL<<(63-62)) 1830d09e41aSPaolo Bonzini #define H_DABRX_USER (1ULL<<(63-63)) 1840d09e41aSPaolo Bonzini 1850d09e41aSPaolo Bonzini /* Each control block has to be on a 4K boundary */ 1860d09e41aSPaolo Bonzini #define H_CB_ALIGNMENT 4096 1870d09e41aSPaolo Bonzini 1880d09e41aSPaolo Bonzini /* pSeries hypervisor opcodes */ 1890d09e41aSPaolo Bonzini #define H_REMOVE 0x04 1900d09e41aSPaolo Bonzini #define H_ENTER 0x08 1910d09e41aSPaolo Bonzini #define H_READ 0x0c 1920d09e41aSPaolo Bonzini #define H_CLEAR_MOD 0x10 1930d09e41aSPaolo Bonzini #define H_CLEAR_REF 0x14 1940d09e41aSPaolo Bonzini #define H_PROTECT 0x18 1950d09e41aSPaolo Bonzini #define H_GET_TCE 0x1c 1960d09e41aSPaolo Bonzini #define H_PUT_TCE 0x20 1970d09e41aSPaolo Bonzini #define H_SET_SPRG0 0x24 1980d09e41aSPaolo Bonzini #define H_SET_DABR 0x28 1990d09e41aSPaolo Bonzini #define H_PAGE_INIT 0x2c 2000d09e41aSPaolo Bonzini #define H_SET_ASR 0x30 2010d09e41aSPaolo Bonzini #define H_ASR_ON 0x34 2020d09e41aSPaolo Bonzini #define H_ASR_OFF 0x38 2030d09e41aSPaolo Bonzini #define H_LOGICAL_CI_LOAD 0x3c 2040d09e41aSPaolo Bonzini #define H_LOGICAL_CI_STORE 0x40 2050d09e41aSPaolo Bonzini #define H_LOGICAL_CACHE_LOAD 0x44 2060d09e41aSPaolo Bonzini #define H_LOGICAL_CACHE_STORE 0x48 2070d09e41aSPaolo Bonzini #define H_LOGICAL_ICBI 0x4c 2080d09e41aSPaolo Bonzini #define H_LOGICAL_DCBF 0x50 2090d09e41aSPaolo Bonzini #define H_GET_TERM_CHAR 0x54 2100d09e41aSPaolo Bonzini #define H_PUT_TERM_CHAR 0x58 2110d09e41aSPaolo Bonzini #define H_REAL_TO_LOGICAL 0x5c 2120d09e41aSPaolo Bonzini #define H_HYPERVISOR_DATA 0x60 2130d09e41aSPaolo Bonzini #define H_EOI 0x64 2140d09e41aSPaolo Bonzini #define H_CPPR 0x68 2150d09e41aSPaolo Bonzini #define H_IPI 0x6c 2160d09e41aSPaolo Bonzini #define H_IPOLL 0x70 2170d09e41aSPaolo Bonzini #define H_XIRR 0x74 2180d09e41aSPaolo Bonzini #define H_PERFMON 0x7c 2190d09e41aSPaolo Bonzini #define H_MIGRATE_DMA 0x78 2200d09e41aSPaolo Bonzini #define H_REGISTER_VPA 0xDC 2210d09e41aSPaolo Bonzini #define H_CEDE 0xE0 2220d09e41aSPaolo Bonzini #define H_CONFER 0xE4 2230d09e41aSPaolo Bonzini #define H_PROD 0xE8 2240d09e41aSPaolo Bonzini #define H_GET_PPP 0xEC 2250d09e41aSPaolo Bonzini #define H_SET_PPP 0xF0 2260d09e41aSPaolo Bonzini #define H_PURR 0xF4 2270d09e41aSPaolo Bonzini #define H_PIC 0xF8 2280d09e41aSPaolo Bonzini #define H_REG_CRQ 0xFC 2290d09e41aSPaolo Bonzini #define H_FREE_CRQ 0x100 2300d09e41aSPaolo Bonzini #define H_VIO_SIGNAL 0x104 2310d09e41aSPaolo Bonzini #define H_SEND_CRQ 0x108 2320d09e41aSPaolo Bonzini #define H_COPY_RDMA 0x110 2330d09e41aSPaolo Bonzini #define H_REGISTER_LOGICAL_LAN 0x114 2340d09e41aSPaolo Bonzini #define H_FREE_LOGICAL_LAN 0x118 2350d09e41aSPaolo Bonzini #define H_ADD_LOGICAL_LAN_BUFFER 0x11C 2360d09e41aSPaolo Bonzini #define H_SEND_LOGICAL_LAN 0x120 2370d09e41aSPaolo Bonzini #define H_BULK_REMOVE 0x124 2380d09e41aSPaolo Bonzini #define H_MULTICAST_CTRL 0x130 2390d09e41aSPaolo Bonzini #define H_SET_XDABR 0x134 2400d09e41aSPaolo Bonzini #define H_STUFF_TCE 0x138 2410d09e41aSPaolo Bonzini #define H_PUT_TCE_INDIRECT 0x13C 2420d09e41aSPaolo Bonzini #define H_CHANGE_LOGICAL_LAN_MAC 0x14C 2430d09e41aSPaolo Bonzini #define H_VTERM_PARTNER_INFO 0x150 2440d09e41aSPaolo Bonzini #define H_REGISTER_VTERM 0x154 2450d09e41aSPaolo Bonzini #define H_FREE_VTERM 0x158 2460d09e41aSPaolo Bonzini #define H_RESET_EVENTS 0x15C 2470d09e41aSPaolo Bonzini #define H_ALLOC_RESOURCE 0x160 2480d09e41aSPaolo Bonzini #define H_FREE_RESOURCE 0x164 2490d09e41aSPaolo Bonzini #define H_MODIFY_QP 0x168 2500d09e41aSPaolo Bonzini #define H_QUERY_QP 0x16C 2510d09e41aSPaolo Bonzini #define H_REREGISTER_PMR 0x170 2520d09e41aSPaolo Bonzini #define H_REGISTER_SMR 0x174 2530d09e41aSPaolo Bonzini #define H_QUERY_MR 0x178 2540d09e41aSPaolo Bonzini #define H_QUERY_MW 0x17C 2550d09e41aSPaolo Bonzini #define H_QUERY_HCA 0x180 2560d09e41aSPaolo Bonzini #define H_QUERY_PORT 0x184 2570d09e41aSPaolo Bonzini #define H_MODIFY_PORT 0x188 2580d09e41aSPaolo Bonzini #define H_DEFINE_AQP1 0x18C 2590d09e41aSPaolo Bonzini #define H_GET_TRACE_BUFFER 0x190 2600d09e41aSPaolo Bonzini #define H_DEFINE_AQP0 0x194 2610d09e41aSPaolo Bonzini #define H_RESIZE_MR 0x198 2620d09e41aSPaolo Bonzini #define H_ATTACH_MCQP 0x19C 2630d09e41aSPaolo Bonzini #define H_DETACH_MCQP 0x1A0 2640d09e41aSPaolo Bonzini #define H_CREATE_RPT 0x1A4 2650d09e41aSPaolo Bonzini #define H_REMOVE_RPT 0x1A8 2660d09e41aSPaolo Bonzini #define H_REGISTER_RPAGES 0x1AC 2670d09e41aSPaolo Bonzini #define H_DISABLE_AND_GETC 0x1B0 2680d09e41aSPaolo Bonzini #define H_ERROR_DATA 0x1B4 2690d09e41aSPaolo Bonzini #define H_GET_HCA_INFO 0x1B8 2700d09e41aSPaolo Bonzini #define H_GET_PERF_COUNT 0x1BC 2710d09e41aSPaolo Bonzini #define H_MANAGE_TRACE 0x1C0 2720d09e41aSPaolo Bonzini #define H_FREE_LOGICAL_LAN_BUFFER 0x1D4 2730d09e41aSPaolo Bonzini #define H_QUERY_INT_STATE 0x1E4 2740d09e41aSPaolo Bonzini #define H_POLL_PENDING 0x1D8 2750d09e41aSPaolo Bonzini #define H_ILLAN_ATTRIBUTES 0x244 2760d09e41aSPaolo Bonzini #define H_MODIFY_HEA_QP 0x250 2770d09e41aSPaolo Bonzini #define H_QUERY_HEA_QP 0x254 2780d09e41aSPaolo Bonzini #define H_QUERY_HEA 0x258 2790d09e41aSPaolo Bonzini #define H_QUERY_HEA_PORT 0x25C 2800d09e41aSPaolo Bonzini #define H_MODIFY_HEA_PORT 0x260 2810d09e41aSPaolo Bonzini #define H_REG_BCMC 0x264 2820d09e41aSPaolo Bonzini #define H_DEREG_BCMC 0x268 2830d09e41aSPaolo Bonzini #define H_REGISTER_HEA_RPAGES 0x26C 2840d09e41aSPaolo Bonzini #define H_DISABLE_AND_GET_HEA 0x270 2850d09e41aSPaolo Bonzini #define H_GET_HEA_INFO 0x274 2860d09e41aSPaolo Bonzini #define H_ALLOC_HEA_RESOURCE 0x278 2870d09e41aSPaolo Bonzini #define H_ADD_CONN 0x284 2880d09e41aSPaolo Bonzini #define H_DEL_CONN 0x288 2890d09e41aSPaolo Bonzini #define H_JOIN 0x298 2900d09e41aSPaolo Bonzini #define H_VASI_STATE 0x2A4 2910d09e41aSPaolo Bonzini #define H_ENABLE_CRQ 0x2B0 2920d09e41aSPaolo Bonzini #define H_GET_EM_PARMS 0x2B8 2930d09e41aSPaolo Bonzini #define H_SET_MPP 0x2D0 2940d09e41aSPaolo Bonzini #define H_GET_MPP 0x2D4 2955d87e4b7SBenjamin Herrenschmidt #define H_XIRR_X 0x2FC 29642561bf2SAnton Blanchard #define H_SET_MODE 0x31C 29742561bf2SAnton Blanchard #define MAX_HCALL_OPCODE H_SET_MODE 2980d09e41aSPaolo Bonzini 2990d09e41aSPaolo Bonzini /* The hcalls above are standardized in PAPR and implemented by pHyp 3000d09e41aSPaolo Bonzini * as well. 3010d09e41aSPaolo Bonzini * 3020d09e41aSPaolo Bonzini * We also need some hcalls which are specific to qemu / KVM-on-POWER. 3030d09e41aSPaolo Bonzini * So far we just need one for H_RTAS, but in future we'll need more 3040d09e41aSPaolo Bonzini * for extensions like virtio. We put those into the 0xf000-0xfffc 3050d09e41aSPaolo Bonzini * range which is reserved by PAPR for "platform-specific" hcalls. 3060d09e41aSPaolo Bonzini */ 3070d09e41aSPaolo Bonzini #define KVMPPC_HCALL_BASE 0xf000 3080d09e41aSPaolo Bonzini #define KVMPPC_H_RTAS (KVMPPC_HCALL_BASE + 0x0) 3090d09e41aSPaolo Bonzini #define KVMPPC_H_LOGICAL_MEMOP (KVMPPC_HCALL_BASE + 0x1) 3102a6593cbSAlexey Kardashevskiy /* Client Architecture support */ 3112a6593cbSAlexey Kardashevskiy #define KVMPPC_H_CAS (KVMPPC_HCALL_BASE + 0x2) 3122a6593cbSAlexey Kardashevskiy #define KVMPPC_HCALL_MAX KVMPPC_H_CAS 3130d09e41aSPaolo Bonzini 3140d09e41aSPaolo Bonzini extern sPAPREnvironment *spapr; 3150d09e41aSPaolo Bonzini 3162a6593cbSAlexey Kardashevskiy typedef struct sPAPRDeviceTreeUpdateHeader { 3172a6593cbSAlexey Kardashevskiy uint32_t version_id; 3182a6593cbSAlexey Kardashevskiy } sPAPRDeviceTreeUpdateHeader; 3192a6593cbSAlexey Kardashevskiy 3200d09e41aSPaolo Bonzini /*#define DEBUG_SPAPR_HCALLS*/ 3210d09e41aSPaolo Bonzini 3220d09e41aSPaolo Bonzini #ifdef DEBUG_SPAPR_HCALLS 3230d09e41aSPaolo Bonzini #define hcall_dprintf(fmt, ...) \ 3240d09e41aSPaolo Bonzini do { fprintf(stderr, "%s: " fmt, __func__, ## __VA_ARGS__); } while (0) 3250d09e41aSPaolo Bonzini #else 3260d09e41aSPaolo Bonzini #define hcall_dprintf(fmt, ...) \ 3270d09e41aSPaolo Bonzini do { } while (0) 3280d09e41aSPaolo Bonzini #endif 3290d09e41aSPaolo Bonzini 3300d09e41aSPaolo Bonzini typedef target_ulong (*spapr_hcall_fn)(PowerPCCPU *cpu, sPAPREnvironment *spapr, 3310d09e41aSPaolo Bonzini target_ulong opcode, 3320d09e41aSPaolo Bonzini target_ulong *args); 3330d09e41aSPaolo Bonzini 3340d09e41aSPaolo Bonzini void spapr_register_hypercall(target_ulong opcode, spapr_hcall_fn fn); 3350d09e41aSPaolo Bonzini target_ulong spapr_hypercall(PowerPCCPU *cpu, target_ulong opcode, 3360d09e41aSPaolo Bonzini target_ulong *args); 3370d09e41aSPaolo Bonzini 3380d09e41aSPaolo Bonzini int spapr_allocate_irq(int hint, bool lsi); 339f1c2dc7cSAlexey Kardashevskiy int spapr_allocate_irq_block(int num, bool lsi, bool msi); 3400d09e41aSPaolo Bonzini 341a64d325dSAlexey Kardashevskiy /* RTAS return codes */ 342a64d325dSAlexey Kardashevskiy #define RTAS_OUT_SUCCESS 0 343a64d325dSAlexey Kardashevskiy #define RTAS_OUT_NO_ERRORS_FOUND 1 344a64d325dSAlexey Kardashevskiy #define RTAS_OUT_HW_ERROR -1 345a64d325dSAlexey Kardashevskiy #define RTAS_OUT_BUSY -2 346a64d325dSAlexey Kardashevskiy #define RTAS_OUT_PARAM_ERROR -3 3473ada6b11SAlexey Kardashevskiy #define RTAS_OUT_NOT_SUPPORTED -3 3483ada6b11SAlexey Kardashevskiy #define RTAS_OUT_NOT_AUTHORIZED -9002 349a64d325dSAlexey Kardashevskiy 3503a3b8502SAlexey Kardashevskiy /* RTAS tokens */ 3513a3b8502SAlexey Kardashevskiy #define RTAS_TOKEN_BASE 0x2000 3523a3b8502SAlexey Kardashevskiy 3533a3b8502SAlexey Kardashevskiy #define RTAS_DISPLAY_CHARACTER (RTAS_TOKEN_BASE + 0x00) 3543a3b8502SAlexey Kardashevskiy #define RTAS_GET_TIME_OF_DAY (RTAS_TOKEN_BASE + 0x01) 3553a3b8502SAlexey Kardashevskiy #define RTAS_SET_TIME_OF_DAY (RTAS_TOKEN_BASE + 0x02) 3563a3b8502SAlexey Kardashevskiy #define RTAS_POWER_OFF (RTAS_TOKEN_BASE + 0x03) 3573a3b8502SAlexey Kardashevskiy #define RTAS_SYSTEM_REBOOT (RTAS_TOKEN_BASE + 0x04) 3583a3b8502SAlexey Kardashevskiy #define RTAS_QUERY_CPU_STOPPED_STATE (RTAS_TOKEN_BASE + 0x05) 3593a3b8502SAlexey Kardashevskiy #define RTAS_START_CPU (RTAS_TOKEN_BASE + 0x06) 3603a3b8502SAlexey Kardashevskiy #define RTAS_STOP_SELF (RTAS_TOKEN_BASE + 0x07) 3613a3b8502SAlexey Kardashevskiy #define RTAS_IBM_GET_SYSTEM_PARAMETER (RTAS_TOKEN_BASE + 0x08) 3623a3b8502SAlexey Kardashevskiy #define RTAS_IBM_SET_SYSTEM_PARAMETER (RTAS_TOKEN_BASE + 0x09) 3633a3b8502SAlexey Kardashevskiy #define RTAS_IBM_SET_XIVE (RTAS_TOKEN_BASE + 0x0A) 3643a3b8502SAlexey Kardashevskiy #define RTAS_IBM_GET_XIVE (RTAS_TOKEN_BASE + 0x0B) 3653a3b8502SAlexey Kardashevskiy #define RTAS_IBM_INT_OFF (RTAS_TOKEN_BASE + 0x0C) 3663a3b8502SAlexey Kardashevskiy #define RTAS_IBM_INT_ON (RTAS_TOKEN_BASE + 0x0D) 3673a3b8502SAlexey Kardashevskiy #define RTAS_CHECK_EXCEPTION (RTAS_TOKEN_BASE + 0x0E) 3683a3b8502SAlexey Kardashevskiy #define RTAS_EVENT_SCAN (RTAS_TOKEN_BASE + 0x0F) 3693a3b8502SAlexey Kardashevskiy #define RTAS_IBM_SET_TCE_BYPASS (RTAS_TOKEN_BASE + 0x10) 3703a3b8502SAlexey Kardashevskiy #define RTAS_QUIESCE (RTAS_TOKEN_BASE + 0x11) 3713a3b8502SAlexey Kardashevskiy #define RTAS_NVRAM_FETCH (RTAS_TOKEN_BASE + 0x12) 3723a3b8502SAlexey Kardashevskiy #define RTAS_NVRAM_STORE (RTAS_TOKEN_BASE + 0x13) 3733a3b8502SAlexey Kardashevskiy #define RTAS_READ_PCI_CONFIG (RTAS_TOKEN_BASE + 0x14) 3743a3b8502SAlexey Kardashevskiy #define RTAS_WRITE_PCI_CONFIG (RTAS_TOKEN_BASE + 0x15) 3753a3b8502SAlexey Kardashevskiy #define RTAS_IBM_READ_PCI_CONFIG (RTAS_TOKEN_BASE + 0x16) 3763a3b8502SAlexey Kardashevskiy #define RTAS_IBM_WRITE_PCI_CONFIG (RTAS_TOKEN_BASE + 0x17) 3773a3b8502SAlexey Kardashevskiy #define RTAS_IBM_QUERY_INTERRUPT_SOURCE_NUMBER (RTAS_TOKEN_BASE + 0x18) 3783a3b8502SAlexey Kardashevskiy #define RTAS_IBM_CHANGE_MSI (RTAS_TOKEN_BASE + 0x19) 3793a3b8502SAlexey Kardashevskiy #define RTAS_SET_INDICATOR (RTAS_TOKEN_BASE + 0x1A) 3803a3b8502SAlexey Kardashevskiy #define RTAS_SET_POWER_LEVEL (RTAS_TOKEN_BASE + 0x1B) 3813a3b8502SAlexey Kardashevskiy #define RTAS_GET_POWER_LEVEL (RTAS_TOKEN_BASE + 0x1C) 3823a3b8502SAlexey Kardashevskiy #define RTAS_GET_SENSOR_STATE (RTAS_TOKEN_BASE + 0x1D) 3833a3b8502SAlexey Kardashevskiy #define RTAS_IBM_CONFIGURE_CONNECTOR (RTAS_TOKEN_BASE + 0x1E) 3843a3b8502SAlexey Kardashevskiy #define RTAS_IBM_OS_TERM (RTAS_TOKEN_BASE + 0x1F) 3853a3b8502SAlexey Kardashevskiy 3862e14072fSNikunj A Dadhania #define RTAS_TOKEN_MAX (RTAS_TOKEN_BASE + 0x20) 3873a3b8502SAlexey Kardashevskiy 3883052d951SSam bobroff /* RTAS ibm,get-system-parameter token values */ 3893b50d897SSam bobroff #define RTAS_SYSPARM_SPLPAR_CHARACTERISTICS 20 3903052d951SSam bobroff #define RTAS_SYSPARM_DIAGNOSTICS_RUN_MODE 42 391b907d7b0SSam bobroff #define RTAS_SYSPARM_UUID 48 3923052d951SSam bobroff 3933052d951SSam bobroff /* Possible values for the platform-processor-diagnostics-run-mode parameter 3943052d951SSam bobroff * of the RTAS ibm,get-system-parameter call. 3953052d951SSam bobroff */ 3963052d951SSam bobroff #define DIAGNOSTICS_RUN_MODE_DISABLED 0 3973052d951SSam bobroff #define DIAGNOSTICS_RUN_MODE_STAGGERED 1 3983052d951SSam bobroff #define DIAGNOSTICS_RUN_MODE_IMMEDIATE 2 3993052d951SSam bobroff #define DIAGNOSTICS_RUN_MODE_PERIODIC 3 4003052d951SSam bobroff 4014fe822e0SAlexey Kardashevskiy static inline uint64_t ppc64_phys_to_real(uint64_t addr) 4024fe822e0SAlexey Kardashevskiy { 4034fe822e0SAlexey Kardashevskiy return addr & ~0xF000000000000000ULL; 4044fe822e0SAlexey Kardashevskiy } 4054fe822e0SAlexey Kardashevskiy 4060d09e41aSPaolo Bonzini static inline uint32_t rtas_ld(target_ulong phys, int n) 4070d09e41aSPaolo Bonzini { 408fdfba1a2SEdgar E. Iglesias return ldl_be_phys(&address_space_memory, ppc64_phys_to_real(phys + 4*n)); 4090d09e41aSPaolo Bonzini } 4100d09e41aSPaolo Bonzini 4110d09e41aSPaolo Bonzini static inline void rtas_st(target_ulong phys, int n, uint32_t val) 4120d09e41aSPaolo Bonzini { 413ab1da857SEdgar E. Iglesias stl_be_phys(&address_space_memory, ppc64_phys_to_real(phys + 4*n), val); 4140d09e41aSPaolo Bonzini } 4150d09e41aSPaolo Bonzini 416ce3fa1ecSSam bobroff 417ce3fa1ecSSam bobroff static inline void rtas_st_buffer(target_ulong phys, target_ulong phys_len, 418ce3fa1ecSSam bobroff uint8_t *buffer, uint16_t buffer_len) 419ce3fa1ecSSam bobroff { 420ce3fa1ecSSam bobroff if (phys_len < 2) { 421ce3fa1ecSSam bobroff return; 422ce3fa1ecSSam bobroff } 423ce3fa1ecSSam bobroff stw_be_phys(&address_space_memory, 424ce3fa1ecSSam bobroff ppc64_phys_to_real(phys), buffer_len); 425ce3fa1ecSSam bobroff cpu_physical_memory_write(ppc64_phys_to_real(phys + 2), 426ce3fa1ecSSam bobroff buffer, MIN(buffer_len, phys_len - 2)); 427ce3fa1ecSSam bobroff } 428ce3fa1ecSSam bobroff 429210b580bSAnthony Liguori typedef void (*spapr_rtas_fn)(PowerPCCPU *cpu, sPAPREnvironment *spapr, 430210b580bSAnthony Liguori uint32_t token, 4310d09e41aSPaolo Bonzini uint32_t nargs, target_ulong args, 4320d09e41aSPaolo Bonzini uint32_t nret, target_ulong rets); 4333a3b8502SAlexey Kardashevskiy void spapr_rtas_register(int token, const char *name, spapr_rtas_fn fn); 434210b580bSAnthony Liguori target_ulong spapr_rtas_call(PowerPCCPU *cpu, sPAPREnvironment *spapr, 4350d09e41aSPaolo Bonzini uint32_t token, uint32_t nargs, target_ulong args, 4360d09e41aSPaolo Bonzini uint32_t nret, target_ulong rets); 4370d09e41aSPaolo Bonzini int spapr_rtas_device_tree_setup(void *fdt, hwaddr rtas_addr, 4380d09e41aSPaolo Bonzini hwaddr rtas_size); 4390d09e41aSPaolo Bonzini 4400d09e41aSPaolo Bonzini #define SPAPR_TCE_PAGE_SHIFT 12 4410d09e41aSPaolo Bonzini #define SPAPR_TCE_PAGE_SIZE (1ULL << SPAPR_TCE_PAGE_SHIFT) 4420d09e41aSPaolo Bonzini #define SPAPR_TCE_PAGE_MASK (SPAPR_TCE_PAGE_SIZE - 1) 4430d09e41aSPaolo Bonzini 4440d09e41aSPaolo Bonzini #define SPAPR_VIO_BASE_LIOBN 0x00000000 4450d09e41aSPaolo Bonzini #define SPAPR_PCI_BASE_LIOBN 0x80000000 4460d09e41aSPaolo Bonzini 4470d09e41aSPaolo Bonzini #define RTAS_ERROR_LOG_MAX 2048 4480d09e41aSPaolo Bonzini 4492b7dc949SPaolo Bonzini typedef struct sPAPRTCETable sPAPRTCETable; 4500d09e41aSPaolo Bonzini 451a83000f5SAnthony Liguori #define TYPE_SPAPR_TCE_TABLE "spapr-tce-table" 452a83000f5SAnthony Liguori #define SPAPR_TCE_TABLE(obj) \ 453a83000f5SAnthony Liguori OBJECT_CHECK(sPAPRTCETable, (obj), TYPE_SPAPR_TCE_TABLE) 454a83000f5SAnthony Liguori 455a83000f5SAnthony Liguori struct sPAPRTCETable { 456a83000f5SAnthony Liguori DeviceState parent; 457a83000f5SAnthony Liguori uint32_t liobn; 458a83000f5SAnthony Liguori uint32_t nb_table; 4591b8eceeeSAlexey Kardashevskiy uint64_t bus_offset; 460650f33adSAlexey Kardashevskiy uint32_t page_shift; 461a83000f5SAnthony Liguori uint64_t *table; 462a83000f5SAnthony Liguori bool bypass; 4639bb62a07SAlexey Kardashevskiy bool vfio_accel; 464a83000f5SAnthony Liguori int fd; 465a83000f5SAnthony Liguori MemoryRegion iommu; 466a83000f5SAnthony Liguori QLIST_ENTRY(sPAPRTCETable) list; 467a83000f5SAnthony Liguori }; 468a83000f5SAnthony Liguori 4690d09e41aSPaolo Bonzini void spapr_events_init(sPAPREnvironment *spapr); 4700d09e41aSPaolo Bonzini void spapr_events_fdt_skel(void *fdt, uint32_t epow_irq); 4712a6593cbSAlexey Kardashevskiy int spapr_h_cas_compose_response(target_ulong addr, target_ulong size); 47284af6d9fSPaolo Bonzini sPAPRTCETable *spapr_tce_new_table(DeviceState *owner, uint32_t liobn, 4731b8eceeeSAlexey Kardashevskiy uint64_t bus_offset, 474650f33adSAlexey Kardashevskiy uint32_t page_shift, 4759bb62a07SAlexey Kardashevskiy uint32_t nb_table, 4769bb62a07SAlexey Kardashevskiy bool vfio_accel); 477a84bb436SPaolo Bonzini MemoryRegion *spapr_tce_get_iommu(sPAPRTCETable *tcet); 4782b7dc949SPaolo Bonzini void spapr_tce_set_bypass(sPAPRTCETable *tcet, bool bypass); 4790d09e41aSPaolo Bonzini int spapr_dma_dt(void *fdt, int node_off, const char *propname, 4800d09e41aSPaolo Bonzini uint32_t liobn, uint64_t window, uint32_t size); 4810d09e41aSPaolo Bonzini int spapr_tcet_dma_dt(void *fdt, int node_off, const char *propname, 4822b7dc949SPaolo Bonzini sPAPRTCETable *tcet); 4830d09e41aSPaolo Bonzini 4840d09e41aSPaolo Bonzini #endif /* !defined (__HW_SPAPR_H__) */ 485