1 /* 2 * QEMU PowerPC PowerNV XSCOM bus definitions 3 * 4 * Copyright (c) 2016, IBM Corporation. 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License as published by the Free Software Foundation; either 9 * version 2 of the License, or (at your option) any later version. 10 * 11 * This library is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * Lesser General Public License for more details. 15 * 16 * You should have received a copy of the GNU Lesser General Public 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #ifndef PPC_PNV_XSCOM_H 21 #define PPC_PNV_XSCOM_H 22 23 #include "qom/object.h" 24 25 typedef struct PnvXScomInterface PnvXScomInterface; 26 27 #define TYPE_PNV_XSCOM_INTERFACE "pnv-xscom-interface" 28 #define PNV_XSCOM_INTERFACE(obj) \ 29 INTERFACE_CHECK(PnvXScomInterface, (obj), TYPE_PNV_XSCOM_INTERFACE) 30 #define PNV_XSCOM_INTERFACE_CLASS(klass) \ 31 OBJECT_CLASS_CHECK(PnvXScomInterfaceClass, (klass), \ 32 TYPE_PNV_XSCOM_INTERFACE) 33 #define PNV_XSCOM_INTERFACE_GET_CLASS(obj) \ 34 OBJECT_GET_CLASS(PnvXScomInterfaceClass, (obj), TYPE_PNV_XSCOM_INTERFACE) 35 36 typedef struct PnvXScomInterfaceClass { 37 InterfaceClass parent; 38 int (*dt_xscom)(PnvXScomInterface *dev, void *fdt, int offset); 39 } PnvXScomInterfaceClass; 40 41 /* 42 * Layout of the XSCOM PCB addresses of EX core 1 (POWER 8) 43 * 44 * GPIO 0x1100xxxx 45 * SCOM 0x1101xxxx 46 * OHA 0x1102xxxx 47 * CLOCK CTL 0x1103xxxx 48 * FIR 0x1104xxxx 49 * THERM 0x1105xxxx 50 * <reserved> 0x1106xxxx 51 * .. 52 * 0x110Exxxx 53 * PCB SLAVE 0x110Fxxxx 54 */ 55 56 #define PNV_XSCOM_EX_CORE_BASE 0x10000000ull 57 58 #define PNV_XSCOM_EX_BASE(core) \ 59 (PNV_XSCOM_EX_CORE_BASE | ((uint64_t)(core) << 24)) 60 #define PNV_XSCOM_EX_SIZE 0x100000 61 62 #define PNV_XSCOM_LPC_BASE 0xb0020 63 #define PNV_XSCOM_LPC_SIZE 0x4 64 65 #define PNV_XSCOM_PSIHB_BASE 0x2010900 66 #define PNV_XSCOM_PSIHB_SIZE 0x20 67 68 #define PNV_XSCOM_OCC_BASE 0x0066000 69 #define PNV_XSCOM_OCC_SIZE 0x6000 70 71 #define PNV_XSCOM_PBA_BASE 0x2013f00 72 #define PNV_XSCOM_PBA_SIZE 0x40 73 74 /* 75 * Layout of the XSCOM PCB addresses (POWER 9) 76 */ 77 #define PNV9_XSCOM_EC_BASE(core) \ 78 ((uint64_t)(((core) & 0x1F) + 0x20) << 24) 79 #define PNV9_XSCOM_EC_SIZE 0x100000 80 81 #define PNV9_XSCOM_EQ_BASE(core) \ 82 ((uint64_t)(((core) & 0x1C) + 0x40) << 22) 83 #define PNV9_XSCOM_EQ_SIZE 0x100000 84 85 #define PNV9_XSCOM_OCC_BASE PNV_XSCOM_OCC_BASE 86 #define PNV9_XSCOM_OCC_SIZE 0x8000 87 88 #define PNV9_XSCOM_PBA_BASE 0x5012b00 89 #define PNV9_XSCOM_PBA_SIZE 0x40 90 91 #define PNV9_XSCOM_PSIHB_BASE 0x5012900 92 #define PNV9_XSCOM_PSIHB_SIZE 0x100 93 94 #define PNV9_XSCOM_XIVE_BASE 0x5013000 95 #define PNV9_XSCOM_XIVE_SIZE 0x300 96 97 #define PNV9_XSCOM_PEC_NEST_BASE 0x4010c00 98 #define PNV9_XSCOM_PEC_NEST_SIZE 0x100 99 100 #define PNV9_XSCOM_PEC_PCI_BASE 0xd010800 101 #define PNV9_XSCOM_PEC_PCI_SIZE 0x200 102 103 /* XSCOM PCI "pass-through" window to PHB SCOM */ 104 #define PNV9_XSCOM_PEC_PCI_STK0 0x100 105 #define PNV9_XSCOM_PEC_PCI_STK1 0x140 106 #define PNV9_XSCOM_PEC_PCI_STK2 0x180 107 108 /* 109 * Layout of the XSCOM PCB addresses (POWER 10) 110 */ 111 #define PNV10_XSCOM_EQ_CHIPLET(core) (0x20 + ((core) >> 2)) 112 #define PNV10_XSCOM_EQ(chiplet) ((chiplet) << 24) 113 #define PNV10_XSCOM_EC(proc) \ 114 ((0x2 << 16) | ((1 << (3 - (proc))) << 12)) 115 116 #define PNV10_XSCOM_EQ_BASE(core) \ 117 ((uint64_t) PNV10_XSCOM_EQ(PNV10_XSCOM_EQ_CHIPLET(core))) 118 #define PNV10_XSCOM_EQ_SIZE 0x100000 119 120 #define PNV10_XSCOM_EC_BASE(core) \ 121 ((uint64_t) PNV10_XSCOM_EQ_BASE(core) | PNV10_XSCOM_EC(core & 0x3)) 122 #define PNV10_XSCOM_EC_SIZE 0x100000 123 124 #define PNV10_XSCOM_PSIHB_BASE 0x3011D00 125 #define PNV10_XSCOM_PSIHB_SIZE 0x100 126 127 void pnv_xscom_realize(PnvChip *chip, uint64_t size, Error **errp); 128 int pnv_dt_xscom(PnvChip *chip, void *fdt, int root_offset, 129 uint64_t xscom_base, uint64_t xscom_size, 130 const char *compat, int compat_size); 131 132 void pnv_xscom_add_subregion(PnvChip *chip, hwaddr offset, 133 MemoryRegion *mr); 134 void pnv_xscom_region_init(MemoryRegion *mr, 135 struct Object *owner, 136 const MemoryRegionOps *ops, 137 void *opaque, 138 const char *name, 139 uint64_t size); 140 141 #endif /* PPC_PNV_XSCOM_H */ 142