1 /* 2 * QEMU PowerPC PowerNV Processor Service Interface (PSI) model 3 * 4 * Copyright (c) 2015-2017, IBM Corporation. 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License as published by the Free Software Foundation; either 9 * version 2 of the License, or (at your option) any later version. 10 * 11 * This library is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * Lesser General Public License for more details. 15 * 16 * You should have received a copy of the GNU Lesser General Public 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 #ifndef _PPC_PNV_PSI_H 20 #define _PPC_PNV_PSI_H 21 22 #include "hw/sysbus.h" 23 #include "hw/ppc/xics.h" 24 #include "hw/ppc/xive.h" 25 26 #define TYPE_PNV_PSI "pnv-psi" 27 #define PNV_PSI(obj) \ 28 OBJECT_CHECK(PnvPsi, (obj), TYPE_PNV_PSI) 29 30 #define PSIHB_XSCOM_MAX 0x20 31 32 typedef struct PnvPsi { 33 SysBusDevice parent; 34 35 MemoryRegion regs_mr; 36 uint64_t bar; 37 38 /* FSP region not supported */ 39 /* MemoryRegion fsp_mr; */ 40 uint64_t fsp_bar; 41 42 /* Interrupt generation */ 43 qemu_irq *qirqs; 44 45 /* Registers */ 46 uint64_t regs[PSIHB_XSCOM_MAX]; 47 48 MemoryRegion xscom_regs; 49 } PnvPsi; 50 51 #define TYPE_PNV8_PSI TYPE_PNV_PSI "-POWER8" 52 #define PNV8_PSI(obj) \ 53 OBJECT_CHECK(Pnv8Psi, (obj), TYPE_PNV8_PSI) 54 55 typedef struct Pnv8Psi { 56 PnvPsi parent; 57 58 ICSState ics; 59 } Pnv8Psi; 60 61 #define TYPE_PNV9_PSI TYPE_PNV_PSI "-POWER9" 62 #define PNV9_PSI(obj) \ 63 OBJECT_CHECK(Pnv9Psi, (obj), TYPE_PNV9_PSI) 64 65 typedef struct Pnv9Psi { 66 PnvPsi parent; 67 68 XiveSource source; 69 } Pnv9Psi; 70 71 #define PNV_PSI_CLASS(klass) \ 72 OBJECT_CLASS_CHECK(PnvPsiClass, (klass), TYPE_PNV_PSI) 73 #define PNV_PSI_GET_CLASS(obj) \ 74 OBJECT_GET_CLASS(PnvPsiClass, (obj), TYPE_PNV_PSI) 75 76 typedef struct PnvPsiClass { 77 SysBusDeviceClass parent_class; 78 79 int chip_type; 80 uint32_t xscom_pcba; 81 uint32_t xscom_size; 82 uint64_t bar_mask; 83 84 void (*irq_set)(PnvPsi *psi, int, bool state); 85 } PnvPsiClass; 86 87 /* The PSI and FSP interrupts are muxed on the same IRQ number */ 88 typedef enum PnvPsiIrq { 89 PSIHB_IRQ_PSI, /* internal use only */ 90 PSIHB_IRQ_FSP, /* internal use only */ 91 PSIHB_IRQ_OCC, 92 PSIHB_IRQ_FSI, 93 PSIHB_IRQ_LPC_I2C, 94 PSIHB_IRQ_LOCAL_ERR, 95 PSIHB_IRQ_EXTERNAL, 96 } PnvPsiIrq; 97 98 #define PSI_NUM_INTERRUPTS 6 99 100 void pnv_psi_irq_set(PnvPsi *psi, int irq, bool state); 101 102 /* P9 PSI Interrupts */ 103 #define PSIHB9_IRQ_PSI 0 104 #define PSIHB9_IRQ_OCC 1 105 #define PSIHB9_IRQ_FSI 2 106 #define PSIHB9_IRQ_LPCHC 3 107 #define PSIHB9_IRQ_LOCAL_ERR 4 108 #define PSIHB9_IRQ_GLOBAL_ERR 5 109 #define PSIHB9_IRQ_TPM 6 110 #define PSIHB9_IRQ_LPC_SIRQ0 7 111 #define PSIHB9_IRQ_LPC_SIRQ1 8 112 #define PSIHB9_IRQ_LPC_SIRQ2 9 113 #define PSIHB9_IRQ_LPC_SIRQ3 10 114 #define PSIHB9_IRQ_SBE_I2C 11 115 #define PSIHB9_IRQ_DIO 12 116 #define PSIHB9_IRQ_PSU 13 117 #define PSIHB9_NUM_IRQS 14 118 119 void pnv_psi_pic_print_info(Pnv9Psi *psi, Monitor *mon); 120 121 #endif /* _PPC_PNV_PSI_H */ 122