xref: /openbmc/qemu/include/hw/ppc/pnv_psi.h (revision 0b1183e3)
1 /*
2  * QEMU PowerPC PowerNV Processor Service Interface (PSI) model
3  *
4  * Copyright (c) 2015-2017, IBM Corporation.
5  *
6  * This library is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU Lesser General Public
8  * License as published by the Free Software Foundation; either
9  * version 2 of the License, or (at your option) any later version.
10  *
11  * This library is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * Lesser General Public License for more details.
15  *
16  * You should have received a copy of the GNU Lesser General Public
17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18  */
19 #ifndef _PPC_PNV_PSI_H
20 #define _PPC_PNV_PSI_H
21 
22 #include "hw/sysbus.h"
23 #include "hw/ppc/xics.h"
24 
25 #define TYPE_PNV_PSI "pnv-psi"
26 #define PNV_PSI(obj) \
27      OBJECT_CHECK(PnvPsi, (obj), TYPE_PNV_PSI)
28 
29 #define PSIHB_XSCOM_MAX         0x20
30 
31 typedef struct PnvPsi {
32     SysBusDevice parent;
33 
34     MemoryRegion regs_mr;
35     uint64_t bar;
36 
37     /* FSP region not supported */
38     /* MemoryRegion fsp_mr; */
39     uint64_t fsp_bar;
40 
41     /* Interrupt generation */
42     ICSState ics;
43 
44     /* Registers */
45     uint64_t regs[PSIHB_XSCOM_MAX];
46 
47     MemoryRegion xscom_regs;
48 } PnvPsi;
49 
50 /* The PSI and FSP interrupts are muxed on the same IRQ number */
51 typedef enum PnvPsiIrq {
52     PSIHB_IRQ_PSI, /* internal use only */
53     PSIHB_IRQ_FSP, /* internal use only */
54     PSIHB_IRQ_OCC,
55     PSIHB_IRQ_FSI,
56     PSIHB_IRQ_LPC_I2C,
57     PSIHB_IRQ_LOCAL_ERR,
58     PSIHB_IRQ_EXTERNAL,
59 } PnvPsiIrq;
60 
61 #define PSI_NUM_INTERRUPTS 6
62 
63 extern void pnv_psi_irq_set(PnvPsi *psi, PnvPsiIrq irq, bool state);
64 
65 #endif /* _PPC_PNV_PSI_H */
66