1 /* 2 * QEMU PowerPC PowerNV Emulation of some CHIPTOD behaviour 3 * 4 * Copyright (c) 2022-2023, IBM Corporation. 5 * 6 * SPDX-License-Identifier: GPL-2.0-or-later 7 */ 8 9 #ifndef PPC_PNV_CHIPTOD_H 10 #define PPC_PNV_CHIPTOD_H 11 12 #include "qom/object.h" 13 14 #define TYPE_PNV_CHIPTOD "pnv-chiptod" 15 OBJECT_DECLARE_TYPE(PnvChipTOD, PnvChipTODClass, PNV_CHIPTOD) 16 #define TYPE_PNV9_CHIPTOD TYPE_PNV_CHIPTOD "-POWER9" 17 DECLARE_INSTANCE_CHECKER(PnvChipTOD, PNV9_CHIPTOD, TYPE_PNV9_CHIPTOD) 18 #define TYPE_PNV10_CHIPTOD TYPE_PNV_CHIPTOD "-POWER10" 19 DECLARE_INSTANCE_CHECKER(PnvChipTOD, PNV10_CHIPTOD, TYPE_PNV10_CHIPTOD) 20 21 enum tod_state { 22 tod_error = 0, 23 tod_not_set = 7, 24 tod_running = 2, 25 tod_stopped = 1, 26 }; 27 28 typedef struct PnvCore PnvCore; 29 30 struct PnvChipTOD { 31 DeviceState xd; 32 33 PnvChip *chip; 34 MemoryRegion xscom_regs; 35 36 bool primary; 37 bool secondary; 38 enum tod_state tod_state; 39 uint64_t tod_error; 40 uint64_t pss_mss_ctrl_reg; 41 PnvCore *slave_pc_target; 42 }; 43 44 struct PnvChipTODClass { 45 DeviceClass parent_class; 46 47 void (*broadcast_ttype)(PnvChipTOD *sender, uint32_t trigger); 48 PnvCore *(*tx_ttype_target)(PnvChipTOD *chiptod, uint64_t val); 49 50 int xscom_size; 51 }; 52 53 #endif /* PPC_PNV_CHIPTOD_H */ 54