xref: /openbmc/qemu/include/hw/pci/shpc.h (revision d6032e06)
1 #ifndef SHPC_H
2 #define SHPC_H
3 
4 #include "qemu-common.h"
5 #include "exec/memory.h"
6 #include "migration/vmstate.h"
7 #include "qapi/error.h"
8 #include "hw/hotplug.h"
9 
10 struct SHPCDevice {
11     /* Capability offset in device's config space */
12     int cap;
13 
14     /* # of hot-pluggable slots */
15     int nslots;
16 
17     /* SHPC WRS: working register set */
18     uint8_t *config;
19 
20     /* Used to enable checks on load. Note that writable bits are
21      * never checked even if set in cmask. */
22     uint8_t *cmask;
23 
24     /* Used to implement R/W bytes */
25     uint8_t *wmask;
26 
27     /* Used to implement RW1C(Write 1 to Clear) bytes */
28     uint8_t *w1cmask;
29 
30     /* MMIO for the SHPC BAR */
31     MemoryRegion mmio;
32 
33     /* Bus controlled by this SHPC */
34     PCIBus *sec_bus;
35 
36     /* MSI already requested for this event */
37     int msi_requested;
38 };
39 
40 void shpc_reset(PCIDevice *d);
41 int shpc_bar_size(PCIDevice *dev);
42 int shpc_init(PCIDevice *dev, PCIBus *sec_bus, MemoryRegion *bar, unsigned off);
43 void shpc_cleanup(PCIDevice *dev, MemoryRegion *bar);
44 void shpc_cap_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int len);
45 
46 
47 void shpc_device_hotplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
48                             Error **errp);
49 void shpc_device_hot_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
50                                Error **errp);
51 
52 extern VMStateInfo shpc_vmstate_info;
53 #define SHPC_VMSTATE(_field, _type) \
54     VMSTATE_BUFFER_UNSAFE_INFO(_field, _type, 0, shpc_vmstate_info, 0)
55 
56 #endif
57