1 #ifndef SHPC_H 2 #define SHPC_H 3 4 #include "qemu-common.h" 5 #include "exec/memory.h" 6 #include "migration/vmstate.h" 7 8 struct SHPCDevice { 9 /* Capability offset in device's config space */ 10 int cap; 11 12 /* # of hot-pluggable slots */ 13 int nslots; 14 15 /* SHPC WRS: working register set */ 16 uint8_t *config; 17 18 /* Used to enable checks on load. Note that writable bits are 19 * never checked even if set in cmask. */ 20 uint8_t *cmask; 21 22 /* Used to implement R/W bytes */ 23 uint8_t *wmask; 24 25 /* Used to implement RW1C(Write 1 to Clear) bytes */ 26 uint8_t *w1cmask; 27 28 /* MMIO for the SHPC BAR */ 29 MemoryRegion mmio; 30 31 /* Bus controlled by this SHPC */ 32 PCIBus *sec_bus; 33 34 /* MSI already requested for this event */ 35 int msi_requested; 36 }; 37 38 void shpc_reset(PCIDevice *d); 39 int shpc_bar_size(PCIDevice *dev); 40 int shpc_init(PCIDevice *dev, PCIBus *sec_bus, MemoryRegion *bar, unsigned off); 41 void shpc_cleanup(PCIDevice *dev, MemoryRegion *bar); 42 void shpc_cap_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int len); 43 44 extern VMStateInfo shpc_vmstate_info; 45 #define SHPC_VMSTATE(_field, _type) \ 46 VMSTATE_BUFFER_UNSAFE_INFO(_field, _type, 0, shpc_vmstate_info, 0) 47 48 #endif 49