xref: /openbmc/qemu/include/hw/pci/shpc.h (revision 3d9569b8)
1 #ifndef SHPC_H
2 #define SHPC_H
3 
4 #include "exec/memory.h"
5 #include "hw/hotplug.h"
6 #include "hw/pci/pci.h"
7 
8 struct SHPCDevice {
9     /* Capability offset in device's config space */
10     int cap;
11 
12     /* # of hot-pluggable slots */
13     int nslots;
14 
15     /* SHPC WRS: working register set */
16     uint8_t *config;
17 
18     /* Used to enable checks on load. Note that writable bits are
19      * never checked even if set in cmask. */
20     uint8_t *cmask;
21 
22     /* Used to implement R/W bytes */
23     uint8_t *wmask;
24 
25     /* Used to implement RW1C(Write 1 to Clear) bytes */
26     uint8_t *w1cmask;
27 
28     /* MMIO for the SHPC BAR */
29     MemoryRegion mmio;
30 
31     /* Bus controlled by this SHPC */
32     PCIBus *sec_bus;
33 
34     /* MSI already requested for this event */
35     int msi_requested;
36 };
37 
38 void shpc_reset(PCIDevice *d);
39 int shpc_bar_size(PCIDevice *dev);
40 int shpc_init(PCIDevice *dev, PCIBus *sec_bus, MemoryRegion *bar,
41               unsigned off, Error **errp);
42 void shpc_cleanup(PCIDevice *dev, MemoryRegion *bar);
43 void shpc_free(PCIDevice *dev);
44 void shpc_cap_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int len);
45 
46 
47 void shpc_device_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
48                          Error **errp);
49 void shpc_device_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
50                            Error **errp);
51 void shpc_device_unplug_request_cb(HotplugHandler *hotplug_dev,
52                                    DeviceState *dev, Error **errp);
53 
54 extern VMStateInfo shpc_vmstate_info;
55 #define SHPC_VMSTATE(_field, _type,  _test) \
56     VMSTATE_BUFFER_UNSAFE_INFO_TEST(_field, _type, _test, 0, \
57                                     shpc_vmstate_info, 0)
58 
59 static inline bool shpc_present(const PCIDevice *dev)
60 {
61     return dev->cap_present & QEMU_PCI_CAP_SHPC;
62 }
63 
64 #endif
65