1 /* 2 * pcie_port.h 3 * 4 * Copyright (c) 2010 Isaku Yamahata <yamahata at valinux co jp> 5 * VA Linux Systems Japan K.K. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License along 18 * with this program; if not, see <http://www.gnu.org/licenses/>. 19 */ 20 21 #ifndef QEMU_PCIE_PORT_H 22 #define QEMU_PCIE_PORT_H 23 24 #include "hw/pci/pci_bridge.h" 25 #include "hw/pci/pci_bus.h" 26 #include "hw/pci/pci_device.h" 27 #include "qom/object.h" 28 29 #define TYPE_PCIE_PORT "pcie-port" 30 OBJECT_DECLARE_SIMPLE_TYPE(PCIEPort, PCIE_PORT) 31 32 struct PCIEPort { 33 /*< private >*/ 34 PCIBridge parent_obj; 35 /*< public >*/ 36 37 /* pci express switch port */ 38 uint8_t port; 39 }; 40 41 void pcie_port_init_reg(PCIDevice *d); 42 43 PCIDevice *pcie_find_port_by_pn(PCIBus *bus, uint8_t pn); 44 PCIDevice *pcie_find_port_first(PCIBus *bus); 45 int pcie_count_ds_ports(PCIBus *bus); 46 47 #define TYPE_PCIE_SLOT "pcie-slot" 48 OBJECT_DECLARE_SIMPLE_TYPE(PCIESlot, PCIE_SLOT) 49 50 struct PCIESlot { 51 /*< private >*/ 52 PCIEPort parent_obj; 53 /*< public >*/ 54 55 /* pci express switch port with slot */ 56 uint8_t chassis; 57 uint16_t slot; 58 59 PCIExpLinkSpeed speed; 60 PCIExpLinkWidth width; 61 62 /* Disable ACS (really for a pcie_root_port) */ 63 bool disable_acs; 64 65 /* Indicates whether any type of hot-plug is allowed on the slot */ 66 bool hotplug; 67 68 /* broken ACPI hotplug compat knob to preserve 6.1 ABI intact */ 69 bool hide_native_hotplug_cap; 70 71 QLIST_ENTRY(PCIESlot) next; 72 }; 73 74 void pcie_chassis_create(uint8_t chassis_number); 75 PCIESlot *pcie_chassis_find_slot(uint8_t chassis, uint16_t slot); 76 int pcie_chassis_add_slot(struct PCIESlot *slot); 77 void pcie_chassis_del_slot(PCIESlot *s); 78 79 #define TYPE_PCIE_ROOT_PORT "pcie-root-port-base" 80 typedef struct PCIERootPortClass PCIERootPortClass; 81 DECLARE_CLASS_CHECKERS(PCIERootPortClass, PCIE_ROOT_PORT, 82 TYPE_PCIE_ROOT_PORT) 83 84 struct PCIERootPortClass { 85 PCIDeviceClass parent_class; 86 DeviceRealize parent_realize; 87 ResettablePhases parent_phases; 88 89 uint8_t (*aer_vector)(const PCIDevice *dev); 90 int (*interrupts_init)(PCIDevice *dev, Error **errp); 91 void (*interrupts_uninit)(PCIDevice *dev); 92 93 int exp_offset; 94 int aer_offset; 95 int ssvid_offset; 96 int acs_offset; /* If nonzero, optional ACS capability offset */ 97 int ssid; 98 }; 99 100 #endif /* QEMU_PCIE_PORT_H */ 101