xref: /openbmc/qemu/include/hw/pci/pcie_port.h (revision 8fa3b702)
1 /*
2  * pcie_port.h
3  *
4  * Copyright (c) 2010 Isaku Yamahata <yamahata at valinux co jp>
5  *                    VA Linux Systems Japan K.K.
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License along
18  * with this program; if not, see <http://www.gnu.org/licenses/>.
19  */
20 
21 #ifndef QEMU_PCIE_PORT_H
22 #define QEMU_PCIE_PORT_H
23 
24 #include "hw/pci/pci_bridge.h"
25 #include "hw/pci/pci_bus.h"
26 #include "qom/object.h"
27 
28 #define TYPE_PCIE_PORT "pcie-port"
29 DECLARE_INSTANCE_CHECKER(PCIEPort, PCIE_PORT,
30                          TYPE_PCIE_PORT)
31 
32 struct PCIEPort {
33     /*< private >*/
34     PCIBridge   parent_obj;
35     /*< public >*/
36 
37     /* pci express switch port */
38     uint8_t     port;
39 };
40 
41 void pcie_port_init_reg(PCIDevice *d);
42 
43 #define TYPE_PCIE_SLOT "pcie-slot"
44 DECLARE_INSTANCE_CHECKER(PCIESlot, PCIE_SLOT,
45                          TYPE_PCIE_SLOT)
46 
47 struct PCIESlot {
48     /*< private >*/
49     PCIEPort    parent_obj;
50     /*< public >*/
51 
52     /* pci express switch port with slot */
53     uint8_t     chassis;
54     uint16_t    slot;
55 
56     PCIExpLinkSpeed speed;
57     PCIExpLinkWidth width;
58 
59     /* Disable ACS (really for a pcie_root_port) */
60     bool        disable_acs;
61 
62     /* Indicates whether hot-plug is enabled on the slot */
63     bool        hotplug;
64     QLIST_ENTRY(PCIESlot) next;
65 };
66 
67 void pcie_chassis_create(uint8_t chassis_number);
68 PCIESlot *pcie_chassis_find_slot(uint8_t chassis, uint16_t slot);
69 int pcie_chassis_add_slot(struct PCIESlot *slot);
70 void pcie_chassis_del_slot(PCIESlot *s);
71 
72 #define TYPE_PCIE_ROOT_PORT         "pcie-root-port-base"
73 typedef struct PCIERootPortClass PCIERootPortClass;
74 DECLARE_CLASS_CHECKERS(PCIERootPortClass, PCIE_ROOT_PORT,
75                        TYPE_PCIE_ROOT_PORT)
76 
77 struct PCIERootPortClass {
78     PCIDeviceClass parent_class;
79     DeviceRealize parent_realize;
80     DeviceReset parent_reset;
81 
82     uint8_t (*aer_vector)(const PCIDevice *dev);
83     int (*interrupts_init)(PCIDevice *dev, Error **errp);
84     void (*interrupts_uninit)(PCIDevice *dev);
85 
86     int exp_offset;
87     int aer_offset;
88     int ssvid_offset;
89     int acs_offset;    /* If nonzero, optional ACS capability offset */
90     int ssid;
91 };
92 
93 #endif /* QEMU_PCIE_PORT_H */
94