1 /* 2 * pcie.h 3 * 4 * Copyright (c) 2010 Isaku Yamahata <yamahata at valinux co jp> 5 * VA Linux Systems Japan K.K. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License along 18 * with this program; if not, see <http://www.gnu.org/licenses/>. 19 */ 20 21 #ifndef QEMU_PCIE_H 22 #define QEMU_PCIE_H 23 24 #include "hw/hw.h" 25 #include "hw/pci/pci_regs.h" 26 #include "hw/pci/pcie_regs.h" 27 #include "hw/pci/pcie_aer.h" 28 #include "hw/hotplug.h" 29 30 typedef enum { 31 /* for attention and power indicator */ 32 PCI_EXP_HP_IND_RESERVED = PCI_EXP_SLTCTL_IND_RESERVED, 33 PCI_EXP_HP_IND_ON = PCI_EXP_SLTCTL_IND_ON, 34 PCI_EXP_HP_IND_BLINK = PCI_EXP_SLTCTL_IND_BLINK, 35 PCI_EXP_HP_IND_OFF = PCI_EXP_SLTCTL_IND_OFF, 36 } PCIExpressIndicator; 37 38 typedef enum { 39 /* these bits must match the bits in Slot Control/Status registers. 40 * PCI_EXP_HP_EV_xxx = PCI_EXP_SLTCTL_xxxE = PCI_EXP_SLTSTA_xxx 41 * 42 * Not all the bits of slot control register match with the ones of 43 * slot status. Not some bits of slot status register is used to 44 * show status, not to report event occurrence. 45 * So such bits must be masked out when checking the software 46 * notification condition. 47 */ 48 PCI_EXP_HP_EV_ABP = PCI_EXP_SLTCTL_ABPE, 49 /* attention button pressed */ 50 PCI_EXP_HP_EV_PDC = PCI_EXP_SLTCTL_PDCE, 51 /* presence detect changed */ 52 PCI_EXP_HP_EV_CCI = PCI_EXP_SLTCTL_CCIE, 53 /* command completed */ 54 55 PCI_EXP_HP_EV_SUPPORTED = PCI_EXP_HP_EV_ABP | 56 PCI_EXP_HP_EV_PDC | 57 PCI_EXP_HP_EV_CCI, 58 /* supported event mask */ 59 60 /* events not listed aren't supported */ 61 } PCIExpressHotPlugEvent; 62 63 struct PCIExpressDevice { 64 /* Offset of express capability in config space */ 65 uint8_t exp_cap; 66 67 /* SLOT */ 68 bool hpev_notified; /* Logical AND of conditions for hot plug event. 69 Following 6.7.3.4: 70 Software Notification of Hot-Plug Events, an interrupt 71 is sent whenever the logical and of these conditions 72 transitions from false to true. */ 73 74 /* AER */ 75 uint16_t aer_cap; 76 PCIEAERLog aer_log; 77 }; 78 79 #define COMPAT_PROP_PCP "power_controller_present" 80 81 /* PCI express capability helper functions */ 82 int pcie_cap_init(PCIDevice *dev, uint8_t offset, uint8_t type, uint8_t port); 83 int pcie_endpoint_cap_init(PCIDevice *dev, uint8_t offset); 84 void pcie_cap_exit(PCIDevice *dev); 85 uint8_t pcie_cap_get_type(const PCIDevice *dev); 86 void pcie_cap_flags_set_vector(PCIDevice *dev, uint8_t vector); 87 uint8_t pcie_cap_flags_get_vector(PCIDevice *dev); 88 89 void pcie_cap_deverr_init(PCIDevice *dev); 90 void pcie_cap_deverr_reset(PCIDevice *dev); 91 92 void pcie_cap_slot_init(PCIDevice *dev, uint16_t slot); 93 void pcie_cap_slot_reset(PCIDevice *dev); 94 void pcie_cap_slot_write_config(PCIDevice *dev, 95 uint32_t addr, uint32_t val, int len); 96 int pcie_cap_slot_post_load(void *opaque, int version_id); 97 void pcie_cap_slot_push_attention_button(PCIDevice *dev); 98 99 void pcie_cap_root_init(PCIDevice *dev); 100 void pcie_cap_root_reset(PCIDevice *dev); 101 102 void pcie_cap_flr_init(PCIDevice *dev); 103 void pcie_cap_flr_write_config(PCIDevice *dev, 104 uint32_t addr, uint32_t val, int len); 105 106 /* ARI forwarding capability and control */ 107 void pcie_cap_arifwd_init(PCIDevice *dev); 108 void pcie_cap_arifwd_reset(PCIDevice *dev); 109 bool pcie_cap_is_arifwd_enabled(const PCIDevice *dev); 110 111 /* PCI express extended capability helper functions */ 112 uint16_t pcie_find_capability(PCIDevice *dev, uint16_t cap_id); 113 void pcie_add_capability(PCIDevice *dev, 114 uint16_t cap_id, uint8_t cap_ver, 115 uint16_t offset, uint16_t size); 116 117 void pcie_ari_init(PCIDevice *dev, uint16_t offset, uint16_t nextfn); 118 119 extern const VMStateDescription vmstate_pcie_device; 120 121 #define VMSTATE_PCIE_DEVICE(_field, _state) { \ 122 .name = (stringify(_field)), \ 123 .size = sizeof(PCIDevice), \ 124 .vmsd = &vmstate_pcie_device, \ 125 .flags = VMS_STRUCT, \ 126 .offset = vmstate_offset_value(_state, _field, PCIDevice), \ 127 } 128 129 void pcie_cap_slot_hotplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev, 130 Error **errp); 131 void pcie_cap_slot_hot_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev, 132 Error **errp); 133 #endif /* QEMU_PCIE_H */ 134