xref: /openbmc/qemu/include/hw/pci/pci_bus.h (revision b15c0f7d)
1 #ifndef QEMU_PCI_BUS_H
2 #define QEMU_PCI_BUS_H
3 
4 #include "hw/pci/pci.h"
5 
6 /*
7  * PCI Bus datastructures.
8  *
9  * Do not access the following members directly;
10  * use accessor functions in pci.h
11  */
12 
13 typedef struct PCIBusClass {
14     /*< private >*/
15     BusClass parent_class;
16     /*< public >*/
17 
18     int (*bus_num)(PCIBus *bus);
19     uint16_t (*numa_node)(PCIBus *bus);
20     bool (*allows_extended_config_space)(PCIBus *bus);
21 } PCIBusClass;
22 
23 enum PCIBusFlags {
24     /* This bus is the root of a PCI domain */
25     PCI_BUS_IS_ROOT                                         = 0x0001,
26 };
27 
28 struct PCIBus {
29     BusState qbus;
30     enum PCIBusFlags flags;
31     PCIIOMMUFunc iommu_fn;
32     void *iommu_opaque;
33     uint8_t devfn_min;
34     uint32_t slot_reserved_mask;
35     pci_set_irq_fn set_irq;
36     pci_map_irq_fn map_irq;
37     pci_route_irq_fn route_intx_to_irq;
38     void *irq_opaque;
39     PCIDevice *devices[PCI_SLOT_MAX * PCI_FUNC_MAX];
40     PCIDevice *parent_dev;
41     MemoryRegion *address_space_mem;
42     MemoryRegion *address_space_io;
43 
44     QLIST_HEAD(, PCIBus) child; /* this will be replaced by qdev later */
45     QLIST_ENTRY(PCIBus) sibling;/* this will be replaced by qdev later */
46 
47     /* The bus IRQ state is the logical OR of the connected devices.
48        Keep a count of the number of devices with raised IRQs.  */
49     int nirq;
50     int *irq_count;
51 
52     Notifier machine_done;
53 };
54 
55 static inline bool pci_bus_is_root(PCIBus *bus)
56 {
57     return !!(bus->flags & PCI_BUS_IS_ROOT);
58 }
59 
60 #endif /* QEMU_PCI_BUS_H */
61