1 #ifndef QEMU_PCI_BUS_H 2 #define QEMU_PCI_BUS_H 3 4 /* 5 * PCI Bus and Bridge datastructures. 6 * 7 * Do not access the following members directly; 8 * use accessor functions in pci.h, pci_bridge.h 9 */ 10 11 typedef struct PCIBusClass { 12 /*< private >*/ 13 BusClass parent_class; 14 /*< public >*/ 15 16 bool (*is_root)(PCIBus *bus); 17 int (*bus_num)(PCIBus *bus); 18 uint16_t (*numa_node)(PCIBus *bus); 19 } PCIBusClass; 20 21 struct PCIBus { 22 BusState qbus; 23 PCIIOMMUFunc iommu_fn; 24 void *iommu_opaque; 25 uint8_t devfn_min; 26 uint32_t slot_reserved_mask; 27 pci_set_irq_fn set_irq; 28 pci_map_irq_fn map_irq; 29 pci_route_irq_fn route_intx_to_irq; 30 void *irq_opaque; 31 PCIDevice *devices[PCI_SLOT_MAX * PCI_FUNC_MAX]; 32 PCIDevice *parent_dev; 33 MemoryRegion *address_space_mem; 34 MemoryRegion *address_space_io; 35 36 QLIST_HEAD(, PCIBus) child; /* this will be replaced by qdev later */ 37 QLIST_ENTRY(PCIBus) sibling;/* this will be replaced by qdev later */ 38 39 /* The bus IRQ state is the logical OR of the connected devices. 40 Keep a count of the number of devices with raised IRQs. */ 41 int nirq; 42 int *irq_count; 43 44 Notifier machine_done; 45 }; 46 47 typedef struct PCIBridgeWindows PCIBridgeWindows; 48 49 /* 50 * Aliases for each of the address space windows that the bridge 51 * can forward. Mapped into the bridge's parent's address space, 52 * as subregions. 53 */ 54 struct PCIBridgeWindows { 55 MemoryRegion alias_pref_mem; 56 MemoryRegion alias_mem; 57 MemoryRegion alias_io; 58 /* 59 * When bridge control VGA forwarding is enabled, bridges will 60 * provide positive decode on the PCI VGA defined I/O port and 61 * MMIO ranges. When enabled forwarding is only qualified on the 62 * I/O and memory enable bits in the bridge command register. 63 */ 64 MemoryRegion alias_vga[QEMU_PCI_VGA_NUM_REGIONS]; 65 }; 66 67 #define TYPE_PCI_BRIDGE "base-pci-bridge" 68 #define PCI_BRIDGE(obj) OBJECT_CHECK(PCIBridge, (obj), TYPE_PCI_BRIDGE) 69 70 struct PCIBridge { 71 /*< private >*/ 72 PCIDevice parent_obj; 73 /*< public >*/ 74 75 /* private member */ 76 PCIBus sec_bus; 77 /* 78 * Memory regions for the bridge's address spaces. These regions are not 79 * directly added to system_memory/system_io or its descendants. 80 * Bridge's secondary bus points to these, so that devices 81 * under the bridge see these regions as its address spaces. 82 * The regions are as large as the entire address space - 83 * they don't take into account any windows. 84 */ 85 MemoryRegion address_space_mem; 86 MemoryRegion address_space_io; 87 88 PCIBridgeWindows *windows; 89 90 pci_map_irq_fn map_irq; 91 const char *bus_name; 92 }; 93 94 #endif /* QEMU_PCI_BUS_H */ 95