1 /* 2 * Xilinx PCIe host controller emulation. 3 * 4 * Copyright (c) 2016 Imagination Technologies 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License as published by the Free Software Foundation; either 9 * version 2.1 of the License, or (at your option) any later version. 10 * 11 * This library is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * Lesser General Public License for more details. 15 * 16 * You should have received a copy of the GNU Lesser General Public 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #ifndef HW_XILINX_PCIE_H 21 #define HW_XILINX_PCIE_H 22 23 #include "hw/sysbus.h" 24 #include "hw/pci/pci_bridge.h" 25 #include "hw/pci/pcie_host.h" 26 #include "qom/object.h" 27 28 #define TYPE_XILINX_PCIE_HOST "xilinx-pcie-host" 29 OBJECT_DECLARE_SIMPLE_TYPE(XilinxPCIEHost, XILINX_PCIE_HOST) 30 31 #define TYPE_XILINX_PCIE_ROOT "xilinx-pcie-root" 32 OBJECT_DECLARE_SIMPLE_TYPE(XilinxPCIERoot, XILINX_PCIE_ROOT) 33 34 struct XilinxPCIERoot { 35 PCIBridge parent_obj; 36 }; 37 38 typedef struct XilinxPCIEInt { 39 uint32_t fifo_reg1; 40 uint32_t fifo_reg2; 41 } XilinxPCIEInt; 42 43 struct XilinxPCIEHost { 44 PCIExpressHost parent_obj; 45 46 char name[16]; 47 48 uint32_t bus_nr; 49 uint64_t cfg_base, cfg_size; 50 uint64_t mmio_base, mmio_size; 51 bool link_up; 52 qemu_irq irq; 53 54 MemoryRegion mmio, io; 55 56 XilinxPCIERoot root; 57 58 uint32_t intr; 59 uint32_t intr_mask; 60 XilinxPCIEInt intr_fifo[16]; 61 unsigned int intr_fifo_r, intr_fifo_w; 62 uint32_t rpscr; 63 }; 64 65 #endif /* HW_XILINX_PCIE_H */ 66