1 /* 2 * QEMU SPAPR PCI BUS definitions 3 * 4 * Copyright (c) 2011 Alexey Kardashevskiy <aik@au1.ibm.com> 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License as published by the Free Software Foundation; either 9 * version 2 of the License, or (at your option) any later version. 10 * 11 * This library is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * Lesser General Public License for more details. 15 * 16 * You should have received a copy of the GNU Lesser General Public 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 #if !defined(__HW_SPAPR_H__) 20 #error Please include spapr.h before this file! 21 #endif 22 23 #if !defined(__HW_SPAPR_PCI_H__) 24 #define __HW_SPAPR_PCI_H__ 25 26 #include "hw/pci/pci.h" 27 #include "hw/pci/pci_host.h" 28 #include "hw/ppc/xics.h" 29 30 #define TYPE_SPAPR_PCI_HOST_BRIDGE "spapr-pci-host-bridge" 31 #define TYPE_SPAPR_PCI_VFIO_HOST_BRIDGE "spapr-pci-vfio-host-bridge" 32 33 #define SPAPR_PCI_HOST_BRIDGE(obj) \ 34 OBJECT_CHECK(sPAPRPHBState, (obj), TYPE_SPAPR_PCI_HOST_BRIDGE) 35 36 #define SPAPR_PCI_VFIO_HOST_BRIDGE(obj) \ 37 OBJECT_CHECK(sPAPRPHBVFIOState, (obj), TYPE_SPAPR_PCI_VFIO_HOST_BRIDGE) 38 39 #define SPAPR_PCI_HOST_BRIDGE_CLASS(klass) \ 40 OBJECT_CLASS_CHECK(sPAPRPHBClass, (klass), TYPE_SPAPR_PCI_HOST_BRIDGE) 41 #define SPAPR_PCI_HOST_BRIDGE_GET_CLASS(obj) \ 42 OBJECT_GET_CLASS(sPAPRPHBClass, (obj), TYPE_SPAPR_PCI_HOST_BRIDGE) 43 44 typedef struct sPAPRPHBClass sPAPRPHBClass; 45 typedef struct sPAPRPHBState sPAPRPHBState; 46 typedef struct sPAPRPHBVFIOState sPAPRPHBVFIOState; 47 48 struct sPAPRPHBClass { 49 PCIHostBridgeClass parent_class; 50 51 void (*finish_realize)(sPAPRPHBState *sphb, Error **errp); 52 int (*eeh_set_option)(sPAPRPHBState *sphb, unsigned int addr, int option); 53 int (*eeh_get_state)(sPAPRPHBState *sphb, int *state); 54 int (*eeh_reset)(sPAPRPHBState *sphb, int option); 55 int (*eeh_configure)(sPAPRPHBState *sphb); 56 }; 57 58 typedef struct spapr_pci_msi { 59 uint32_t first_irq; 60 uint32_t num; 61 } spapr_pci_msi; 62 63 typedef struct spapr_pci_msi_mig { 64 uint32_t key; 65 spapr_pci_msi value; 66 } spapr_pci_msi_mig; 67 68 struct sPAPRPHBState { 69 PCIHostState parent_obj; 70 71 uint32_t index; 72 uint64_t buid; 73 char *dtbusname; 74 bool dr_enabled; 75 76 MemoryRegion memspace, iospace; 77 hwaddr mem_win_addr, mem_win_size, io_win_addr, io_win_size; 78 MemoryRegion memwindow, iowindow, msiwindow; 79 80 uint32_t dma_liobn; 81 hwaddr dma_win_addr, dma_win_size; 82 AddressSpace iommu_as; 83 MemoryRegion iommu_root; 84 85 struct spapr_pci_lsi { 86 uint32_t irq; 87 } lsi_table[PCI_NUM_PINS]; 88 89 GHashTable *msi; 90 /* Temporary cache for migration purposes */ 91 int32_t msi_devs_num; 92 spapr_pci_msi_mig *msi_devs; 93 94 QLIST_ENTRY(sPAPRPHBState) list; 95 }; 96 97 struct sPAPRPHBVFIOState { 98 sPAPRPHBState phb; 99 100 int32_t iommugroupid; 101 }; 102 103 #define SPAPR_PCI_MAX_INDEX 255 104 105 #define SPAPR_PCI_BASE_BUID 0x800000020000000ULL 106 107 #define SPAPR_PCI_MEM_WIN_BUS_OFFSET 0x80000000ULL 108 109 #define SPAPR_PCI_WINDOW_BASE 0x10000000000ULL 110 #define SPAPR_PCI_WINDOW_SPACING 0x1000000000ULL 111 #define SPAPR_PCI_MMIO_WIN_OFF 0xA0000000 112 #define SPAPR_PCI_MMIO_WIN_SIZE (SPAPR_PCI_WINDOW_SPACING - \ 113 SPAPR_PCI_MEM_WIN_BUS_OFFSET) 114 #define SPAPR_PCI_IO_WIN_OFF 0x80000000 115 #define SPAPR_PCI_IO_WIN_SIZE 0x10000 116 117 #define SPAPR_PCI_MSI_WINDOW 0x40000000000ULL 118 119 static inline qemu_irq spapr_phb_lsi_qirq(struct sPAPRPHBState *phb, int pin) 120 { 121 sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); 122 123 return xics_get_qirq(spapr->icp, phb->lsi_table[pin].irq); 124 } 125 126 PCIHostState *spapr_create_phb(sPAPRMachineState *spapr, int index); 127 128 int spapr_populate_pci_dt(sPAPRPHBState *phb, 129 uint32_t xics_phandle, 130 void *fdt); 131 132 void spapr_pci_msi_init(sPAPRMachineState *spapr, hwaddr addr); 133 134 void spapr_pci_rtas_init(void); 135 136 sPAPRPHBState *spapr_pci_find_phb(sPAPRMachineState *spapr, uint64_t buid); 137 PCIDevice *spapr_pci_find_dev(sPAPRMachineState *spapr, uint64_t buid, 138 uint32_t config_addr); 139 140 #endif /* __HW_SPAPR_PCI_H__ */ 141