1 #ifndef QEMU_PAM_H 2 #define QEMU_PAM_H 3 4 /* 5 * Copyright (c) 2006 Fabrice Bellard 6 * Copyright (c) 2011 Isaku Yamahata <yamahata at valinux co jp> 7 * VA Linux Systems Japan K.K. 8 * Copyright (c) 2012 Jason Baron <jbaron@redhat.com> 9 * 10 * Split out from piix.c 11 * 12 * Permission is hereby granted, free of charge, to any person obtaining a copy 13 * of this software and associated documentation files (the "Software"), to deal 14 * in the Software without restriction, including without limitation the rights 15 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 16 * copies of the Software, and to permit persons to whom the Software is 17 * furnished to do so, subject to the following conditions: 18 * 19 * The above copyright notice and this permission notice shall be included in 20 * all copies or substantial portions of the Software. 21 * 22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 24 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 27 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 28 * THE SOFTWARE. 29 */ 30 31 /* 32 * SMRAM memory area and PAM memory area in Legacy address range for PC. 33 * PAM: Programmable Attribute Map registers 34 * 35 * 0xa0000 - 0xbffff compatible SMRAM 36 * 37 * 0xc0000 - 0xc3fff Expansion area memory segments 38 * 0xc4000 - 0xc7fff 39 * 0xc8000 - 0xcbfff 40 * 0xcc000 - 0xcffff 41 * 0xd0000 - 0xd3fff 42 * 0xd4000 - 0xd7fff 43 * 0xd8000 - 0xdbfff 44 * 0xdc000 - 0xdffff 45 * 0xe0000 - 0xe3fff Extended System BIOS Area Memory Segments 46 * 0xe4000 - 0xe7fff 47 * 0xe8000 - 0xebfff 48 * 0xec000 - 0xeffff 49 * 50 * 0xf0000 - 0xfffff System BIOS Area Memory Segments 51 */ 52 53 #include "qemu-common.h" 54 #include "exec/memory.h" 55 56 #define SMRAM_C_BASE 0xa0000 57 #define SMRAM_C_END 0xc0000 58 #define SMRAM_C_SIZE 0x20000 59 60 #define PAM_EXPAN_BASE 0xc0000 61 #define PAM_EXPAN_SIZE 0x04000 62 63 #define PAM_EXBIOS_BASE 0xe0000 64 #define PAM_EXBIOS_SIZE 0x04000 65 66 #define PAM_BIOS_BASE 0xf0000 67 #define PAM_BIOS_END 0xfffff 68 /* 64KB: Intel 3 series express chipset family p. 58*/ 69 #define PAM_BIOS_SIZE 0x10000 70 71 /* PAM registers: log nibble and high nibble*/ 72 #define PAM_ATTR_WE ((uint8_t)2) 73 #define PAM_ATTR_RE ((uint8_t)1) 74 #define PAM_ATTR_MASK ((uint8_t)3) 75 76 /* SMRAM register */ 77 #define SMRAM_D_OPEN ((uint8_t)(1 << 6)) 78 #define SMRAM_D_CLS ((uint8_t)(1 << 5)) 79 #define SMRAM_D_LCK ((uint8_t)(1 << 4)) 80 #define SMRAM_G_SMRAME ((uint8_t)(1 << 3)) 81 #define SMRAM_C_BASE_SEG_MASK ((uint8_t)0x7) 82 #define SMRAM_C_BASE_SEG ((uint8_t)0x2) /* hardwired to b010 */ 83 84 typedef struct PAMMemoryRegion { 85 MemoryRegion alias[4]; /* index = PAM value */ 86 unsigned current; 87 } PAMMemoryRegion; 88 89 void init_pam(DeviceState *dev, MemoryRegion *ram, MemoryRegion *system, 90 MemoryRegion *pci, PAMMemoryRegion *mem, uint32_t start, uint32_t size); 91 void pam_update(PAMMemoryRegion *mem, int idx, uint8_t val); 92 93 #endif /* QEMU_PAM_H */ 94