xref: /openbmc/qemu/include/hw/pci-host/ls7a.h (revision 764a6ee9)
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  * QEMU LoongArch CPU
4  *
5  * Copyright (c) 2021 Loongson Technology Corporation Limited
6  */
7 
8 #ifndef HW_LS7A_H
9 #define HW_LS7A_H
10 
11 #include "hw/pci-host/pam.h"
12 #include "qemu/units.h"
13 #include "qemu/range.h"
14 #include "qom/object.h"
15 
16 #define VIRT_PCI_MEM_BASE        0x40000000UL
17 #define VIRT_PCI_MEM_SIZE        0x40000000UL
18 #define VIRT_PCI_IO_OFFSET       0x4000
19 #define VIRT_PCI_CFG_BASE        0x20000000
20 #define VIRT_PCI_CFG_SIZE        0x08000000
21 #define VIRT_PCI_IO_BASE         0x18004000UL
22 #define VIRT_PCI_IO_SIZE         0xC000
23 
24 #define VIRT_PCH_REG_BASE        0x10000000UL
25 #define VIRT_IOAPIC_REG_BASE     (VIRT_PCH_REG_BASE)
26 #define VIRT_PCH_MSI_ADDR_LOW    0x2FF00000UL
27 #define VIRT_PCH_REG_SIZE        0x400
28 #define VIRT_PCH_MSI_SIZE        0x8
29 
30 /*
31  * GSI_BASE is hard-coded with 64 in linux kernel, else kernel fails to boot
32  * 0  - 15  GSI for ISA devices even if there is no ISA devices
33  * 16 - 63  GSI for CPU devices such as timers/perf monitor etc
34  * 64 -     GSI for external devices
35  */
36 #define VIRT_PCH_PIC_IRQ_NUM     32
37 #define VIRT_GSI_BASE            64
38 #define VIRT_DEVICE_IRQS         16
39 #define VIRT_UART_COUNT          4
40 #define VIRT_UART_IRQ            (VIRT_GSI_BASE + 2)
41 #define VIRT_UART_BASE           0x1fe001e0
42 #define VIRT_UART_SIZE           0x100
43 #define VIRT_RTC_IRQ             (VIRT_GSI_BASE + 6)
44 #define VIRT_MISC_REG_BASE       (VIRT_PCH_REG_BASE + 0x00080000)
45 #define VIRT_RTC_REG_BASE        (VIRT_MISC_REG_BASE + 0x00050100)
46 #define VIRT_RTC_LEN             0x100
47 #define VIRT_SCI_IRQ             (VIRT_GSI_BASE + 7)
48 
49 #define VIRT_PLATFORM_BUS_BASEADDRESS   0x16000000
50 #define VIRT_PLATFORM_BUS_SIZE          0x2000000
51 #define VIRT_PLATFORM_BUS_NUM_IRQS      2
52 #define VIRT_PLATFORM_BUS_IRQ           (VIRT_GSI_BASE + 8)
53 #endif
54