xref: /openbmc/qemu/include/hw/pci-host/astro.h (revision 542b10bd)
1 /*
2  * HP-PARISC Astro Bus connector with Elroy PCI host bridges
3  */
4 
5 #ifndef ASTRO_H
6 #define ASTRO_H
7 
8 #include "hw/pci/pci_host.h"
9 
10 #define ASTRO_HPA               0xfed00000
11 
12 #define ROPES_PER_IOC           8       /* per Ike half or Pluto/Astro */
13 
14 #define TYPE_ASTRO_CHIP "astro-chip"
15 OBJECT_DECLARE_SIMPLE_TYPE(AstroState, ASTRO_CHIP)
16 
17 #define TYPE_ELROY_PCI_HOST_BRIDGE "elroy-pcihost"
18 OBJECT_DECLARE_SIMPLE_TYPE(ElroyState, ELROY_PCI_HOST_BRIDGE)
19 
20 #define ELROY_NUM               4 /* # of Elroys */
21 #define ELROY_IRQS              8 /* IOSAPIC IRQs */
22 
23 /* ASTRO Memory and I/O regions */
24 #define LMMIO_DIST_BASE_ADDR      0xf4000000ULL
25 #define LMMIO_DIST_BASE_SIZE       0x4000000ULL
26 
27 #define IOS_DIST_BASE_ADDR      0xfffee00000ULL
28 #define IOS_DIST_BASE_SIZE           0x10000ULL
29 
30 #define HF_ENABLE       0x40    /* enable HF mode (default is -1 mode) */
31 
32 struct AstroState;
33 
34 struct ElroyState {
35     PCIHostState parent_obj;
36 
37     /* parent Astro device */
38     struct AstroState *astro;
39 
40     /* HPA of this Elroy */
41     hwaddr hpa;
42 
43     /* PCI bus number (Elroy number) */
44     unsigned int pci_bus_num;
45 
46     uint64_t config_address;
47     uint64_t config_reg_elroy;
48 
49     uint64_t status_control;
50     uint64_t arb_mask;
51     uint64_t mmio_base[(0x0250 - 0x200) / 8];
52     uint64_t error_config;
53 
54     uint32_t iosapic_reg_select;
55     uint64_t iosapic_reg[0x20];
56 
57     uint32_t ilr;
58 
59     MemoryRegion this_mem;
60 
61     MemoryRegion pci_mmio;
62     MemoryRegion pci_mmio_alias;
63     MemoryRegion pci_hole;
64     MemoryRegion pci_io;
65 };
66 
67 struct AstroState {
68     PCIHostState parent_obj;
69 
70     uint64_t ioc_ctrl;
71     uint64_t ioc_status_ctrl;
72     uint64_t ioc_ranges[(0x03d8 - 0x300) / 8];
73     uint64_t ioc_rope_config;
74     uint64_t ioc_status_control;
75     uint64_t ioc_flush_control;
76     uint64_t ioc_rope_control[8];
77     uint64_t tlb_ibase;
78     uint64_t tlb_imask;
79     uint64_t tlb_pcom;
80     uint64_t tlb_tcnfg;
81     uint64_t tlb_pdir_base;
82 
83     struct ElroyState *elroy[ELROY_NUM];
84 
85     MemoryRegion this_mem;
86 
87     MemoryRegion pci_mmio;
88     MemoryRegion pci_io;
89 
90     IOMMUMemoryRegion iommu;
91     AddressSpace iommu_as;
92 };
93 
94 #endif
95