1 /* 2 * ASPEED PCIe Host Controller 3 * 4 * Copyright (C) 2025 ASPEED Technology Inc. 5 * Copyright (c) 2022 Cédric Le Goater <clg@kaod.org> 6 * 7 * Jamin Lin <jamin_lin@aspeedtech.com> 8 * 9 * SPDX-License-Identifier: GPL-2.0-or-later 10 * 11 * This file is based on Cédric Le Goater's patch: 12 * "pci: Add Aspeed host bridge (WIP)" 13 * https://github.com/legoater/qemu/commit/d1b97b0c7844219d847122410dc189854f9d26df 14 * 15 * Modifications have been made to support the Aspeed AST2600 and AST2700 16 * platforms. 17 */ 18 19 #ifndef ASPEED_PCIE_H 20 #define ASPEED_PCIE_H 21 22 #include "hw/sysbus.h" 23 #include "hw/pci/pci_bridge.h" 24 #include "hw/pci/pcie_host.h" 25 #include "qom/object.h" 26 27 #define TYPE_ASPEED_PCIE_PHY "aspeed.pcie-phy" 28 OBJECT_DECLARE_TYPE(AspeedPCIEPhyState, AspeedPCIEPhyClass, ASPEED_PCIE_PHY); 29 30 struct AspeedPCIEPhyState { 31 SysBusDevice parent_obj; 32 33 MemoryRegion mmio; 34 uint32_t *regs; 35 uint32_t id; 36 }; 37 38 struct AspeedPCIEPhyClass { 39 SysBusDeviceClass parent_class; 40 41 uint64_t nr_regs; 42 }; 43 44 #endif /* ASPEED_PCIE_H */ 45