xref: /openbmc/qemu/include/hw/nvram/xlnx-bbram.h (revision 637b0aa1)
1 /*
2  * QEMU model of the Xilinx BBRAM Battery Backed RAM
3  *
4  * Copyright (c) 2015-2021 Xilinx Inc.
5  *
6  * Written by Edgar E. Iglesias <edgari@xilinx.com>
7  *
8  * Permission is hereby granted, free of charge, to any person obtaining a copy
9  * of this software and associated documentation files (the "Software"), to deal
10  * in the Software without restriction, including without limitation the rights
11  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12  * copies of the Software, and to permit persons to whom the Software is
13  * furnished to do so, subject to the following conditions:
14  *
15  * The above copyright notice and this permission notice shall be included in
16  * all copies or substantial portions of the Software.
17  *
18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24  * THE SOFTWARE.
25  */
26 #ifndef XLNX_BBRAM_H
27 #define XLNX_BBRAM_H
28 
29 #include "sysemu/block-backend.h"
30 #include "hw/qdev-core.h"
31 #include "hw/irq.h"
32 #include "hw/sysbus.h"
33 #include "hw/register.h"
34 
35 #define RMAX_XLNX_BBRAM ((0x4c / 4) + 1)
36 
37 #define TYPE_XLNX_BBRAM "xlnx.bbram-ctrl"
38 OBJECT_DECLARE_SIMPLE_TYPE(XlnxBBRam, XLNX_BBRAM);
39 
40 struct XlnxBBRam {
41     SysBusDevice parent_obj;
42     qemu_irq irq_bbram;
43 
44     BlockBackend *blk;
45 
46     uint32_t crc_zpads;
47     bool bbram8_wo;
48     bool blk_ro;
49 
50     RegisterInfoArray *reg_array;
51     uint32_t regs[RMAX_XLNX_BBRAM];
52     RegisterInfo regs_info[RMAX_XLNX_BBRAM];
53 };
54 
55 #endif
56