1 /*
2  * QEMU model of the Xilinx Versal CANFD Controller.
3  *
4  * Copyright (c) 2023 Advanced Micro Devices, Inc.
5  *
6  * Written-by: Vikram Garhwal<vikram.garhwal@amd.com>
7  * Based on QEMU CANFD Device emulation implemented by Jin Yang, Deniz Eren and
8  * Pavel Pisa.
9  * Permission is hereby granted, free of charge, to any person obtaining a copy
10  * of this software and associated documentation files (the "Software"), to deal
11  * in the Software without restriction, including without limitation the rights
12  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
13  * copies of the Software, and to permit persons to whom the Software is
14  * furnished to do so, subject to the following conditions:
15  *
16  * The above copyright notice and this permission notice shall be included in
17  * all copies or substantial portions of the Software.
18  *
19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
24  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25  * THE SOFTWARE.
26  */
27 
28 #ifndef HW_CANFD_XILINX_H
29 #define HW_CANFD_XILINX_H
30 
31 #include "hw/register.h"
32 #include "hw/ptimer.h"
33 #include "net/can_emu.h"
34 #include "hw/qdev-clock.h"
35 
36 #define TYPE_XILINX_CANFD "xlnx.versal-canfd"
37 
38 OBJECT_DECLARE_SIMPLE_TYPE(XlnxVersalCANFDState, XILINX_CANFD)
39 
40 #define NUM_REGS_PER_MSG_SPACE 18 /* 1 ID + 1 DLC + 16 Data(DW0 - DW15) regs. */
41 #define MAX_NUM_RX             64
42 #define OFFSET_RX1_DW15        (0x4144 / 4)
43 #define CANFD_TIMER_MAX        0xFFFFUL
44 #define CANFD_DEFAULT_CLOCK    (25 * 1000 * 1000)
45 
46 #define XLNX_VERSAL_CANFD_R_MAX (OFFSET_RX1_DW15 + \
47                     ((MAX_NUM_RX - 1) * NUM_REGS_PER_MSG_SPACE) + 1)
48 
49 typedef struct XlnxVersalCANFDState {
50     SysBusDevice            parent_obj;
51     MemoryRegion            iomem;
52 
53     qemu_irq                irq_canfd_int;
54     qemu_irq                irq_addr_err;
55 
56     RegisterInfo            reg_info[XLNX_VERSAL_CANFD_R_MAX];
57     RegisterAccessInfo      *tx_regs;
58     RegisterAccessInfo      *rx0_regs;
59     RegisterAccessInfo      *rx1_regs;
60     RegisterAccessInfo      *af_regs;
61     RegisterAccessInfo      *txe_regs;
62     RegisterAccessInfo      *rx_mailbox_regs;
63     RegisterAccessInfo      *af_mask_regs_mailbox;
64 
65     uint32_t                regs[XLNX_VERSAL_CANFD_R_MAX];
66 
67     ptimer_state            *canfd_timer;
68 
69     CanBusClientState       bus_client;
70     CanBusState             *canfdbus;
71 
72     struct {
73         uint8_t             rx0_fifo;
74         uint8_t             rx1_fifo;
75         uint8_t             tx_fifo;
76         bool                enable_rx_fifo1;
77         uint32_t            ext_clk_freq;
78    } cfg;
79 
80 } XlnxVersalCANFDState;
81 
82 typedef struct tx_ready_reg_info {
83     uint32_t can_id;
84     uint32_t reg_num;
85 } tx_ready_reg_info;
86 
87 #endif
88