xref: /openbmc/qemu/include/hw/net/ftgmac100.h (revision dc5bd18f)
1 /*
2  * Faraday FTGMAC100 Gigabit Ethernet
3  *
4  * Copyright (C) 2016-2017, IBM Corporation.
5  *
6  * This code is licensed under the GPL version 2 or later. See the
7  * COPYING file in the top-level directory.
8  */
9 
10 #ifndef FTGMAC100_H
11 #define FTGMAC100_H
12 
13 #define TYPE_FTGMAC100 "ftgmac100"
14 #define FTGMAC100(obj) OBJECT_CHECK(FTGMAC100State, (obj), TYPE_FTGMAC100)
15 
16 #include "hw/sysbus.h"
17 #include "net/net.h"
18 
19 typedef struct FTGMAC100State {
20     /*< private >*/
21     SysBusDevice parent_obj;
22 
23     /*< public >*/
24     NICState *nic;
25     NICConf conf;
26     qemu_irq irq;
27     MemoryRegion iomem;
28 
29     uint8_t *frame;
30 
31     uint32_t irq_state;
32     uint32_t isr;
33     uint32_t ier;
34     uint32_t rx_enabled;
35     uint32_t rx_ring;
36     uint32_t rx_descriptor;
37     uint32_t tx_ring;
38     uint32_t tx_descriptor;
39     uint32_t math[2];
40     uint32_t rbsr;
41     uint32_t itc;
42     uint32_t aptcr;
43     uint32_t dblac;
44     uint32_t revr;
45     uint32_t fear1;
46     uint32_t tpafcr;
47     uint32_t maccr;
48     uint32_t phycr;
49     uint32_t phydata;
50     uint32_t fcr;
51 
52 
53     uint32_t phy_status;
54     uint32_t phy_control;
55     uint32_t phy_advertise;
56     uint32_t phy_int;
57     uint32_t phy_int_mask;
58 
59     bool aspeed;
60     uint32_t txdes0_edotr;
61     uint32_t rxdes0_edorr;
62 } FTGMAC100State;
63 
64 #endif
65