1 /*
2  * STM32F4xx SYSCFG
3  *
4  * Copyright (c) 2014 Alistair Francis <alistair@alistair23.me>
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to deal
8  * in the Software without restriction, including without limitation the rights
9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10  * copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22  * THE SOFTWARE.
23  */
24 
25 #ifndef HW_STM_SYSCFG_H
26 #define HW_STM_SYSCFG_H
27 
28 #include "hw/sysbus.h"
29 #include "hw/hw.h"
30 #include "qom/object.h"
31 
32 #define SYSCFG_MEMRMP  0x00
33 #define SYSCFG_PMC     0x04
34 #define SYSCFG_EXTICR1 0x08
35 #define SYSCFG_EXTICR2 0x0C
36 #define SYSCFG_EXTICR3 0x10
37 #define SYSCFG_EXTICR4 0x14
38 #define SYSCFG_CMPCR   0x20
39 
40 #define TYPE_STM32F4XX_SYSCFG "stm32f4xx-syscfg"
41 OBJECT_DECLARE_SIMPLE_TYPE(STM32F4xxSyscfgState, STM32F4XX_SYSCFG)
42 
43 #define SYSCFG_NUM_EXTICR 4
44 
45 struct STM32F4xxSyscfgState {
46     /* <private> */
47     SysBusDevice parent_obj;
48 
49     /* <public> */
50     MemoryRegion mmio;
51 
52     uint32_t syscfg_memrmp;
53     uint32_t syscfg_pmc;
54     uint32_t syscfg_exticr[SYSCFG_NUM_EXTICR];
55     uint32_t syscfg_cmpcr;
56 
57     qemu_irq irq;
58     qemu_irq gpio_out[16];
59 };
60 
61 #endif
62