xref: /openbmc/qemu/include/hw/misc/sifive_e_aon.h (revision bf01a04f)
1*bf01a04fSTommy Wu /*
2*bf01a04fSTommy Wu  * SiFive HiFive1 AON (Always On Domain) interface.
3*bf01a04fSTommy Wu  *
4*bf01a04fSTommy Wu  * Copyright (c) 2022 SiFive, Inc. All rights reserved.
5*bf01a04fSTommy Wu  *
6*bf01a04fSTommy Wu  * This program is free software; you can redistribute it and/or modify it
7*bf01a04fSTommy Wu  * under the terms and conditions of the GNU General Public License,
8*bf01a04fSTommy Wu  * version 2 or later, as published by the Free Software Foundation.
9*bf01a04fSTommy Wu  *
10*bf01a04fSTommy Wu  * This program is distributed in the hope it will be useful, but WITHOUT
11*bf01a04fSTommy Wu  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12*bf01a04fSTommy Wu  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13*bf01a04fSTommy Wu  * more details.
14*bf01a04fSTommy Wu  *
15*bf01a04fSTommy Wu  * You should have received a copy of the GNU General Public License along with
16*bf01a04fSTommy Wu  * this program.  If not, see <http://www.gnu.org/licenses/>.
17*bf01a04fSTommy Wu  */
18*bf01a04fSTommy Wu 
19*bf01a04fSTommy Wu #ifndef HW_SIFIVE_AON_H
20*bf01a04fSTommy Wu #define HW_SIFIVE_AON_H
21*bf01a04fSTommy Wu 
22*bf01a04fSTommy Wu #include "hw/sysbus.h"
23*bf01a04fSTommy Wu #include "qom/object.h"
24*bf01a04fSTommy Wu 
25*bf01a04fSTommy Wu #define TYPE_SIFIVE_E_AON "riscv.sifive.e.aon"
26*bf01a04fSTommy Wu OBJECT_DECLARE_SIMPLE_TYPE(SiFiveEAONState, SIFIVE_E_AON)
27*bf01a04fSTommy Wu 
28*bf01a04fSTommy Wu #define SIFIVE_E_AON_WDOGKEY (0x51F15E)
29*bf01a04fSTommy Wu #define SIFIVE_E_AON_WDOGFEED (0xD09F00D)
30*bf01a04fSTommy Wu #define SIFIVE_E_LFCLK_DEFAULT_FREQ (32768)
31*bf01a04fSTommy Wu 
32*bf01a04fSTommy Wu enum {
33*bf01a04fSTommy Wu     SIFIVE_E_AON_WDT    = 0x0,
34*bf01a04fSTommy Wu     SIFIVE_E_AON_RTC    = 0x40,
35*bf01a04fSTommy Wu     SIFIVE_E_AON_LFROSC = 0x70,
36*bf01a04fSTommy Wu     SIFIVE_E_AON_BACKUP = 0x80,
37*bf01a04fSTommy Wu     SIFIVE_E_AON_PMU    = 0x100,
38*bf01a04fSTommy Wu     SIFIVE_E_AON_MAX    = 0x150
39*bf01a04fSTommy Wu };
40*bf01a04fSTommy Wu 
41*bf01a04fSTommy Wu struct SiFiveEAONState {
42*bf01a04fSTommy Wu     /*< private >*/
43*bf01a04fSTommy Wu     SysBusDevice parent_obj;
44*bf01a04fSTommy Wu 
45*bf01a04fSTommy Wu     /*< public >*/
46*bf01a04fSTommy Wu     MemoryRegion mmio;
47*bf01a04fSTommy Wu 
48*bf01a04fSTommy Wu     /*< watchdog timer >*/
49*bf01a04fSTommy Wu     QEMUTimer *wdog_timer;
50*bf01a04fSTommy Wu     qemu_irq wdog_irq;
51*bf01a04fSTommy Wu     uint64_t wdog_restart_time;
52*bf01a04fSTommy Wu     uint64_t wdogclk_freq;
53*bf01a04fSTommy Wu 
54*bf01a04fSTommy Wu     uint32_t wdogcfg;
55*bf01a04fSTommy Wu     uint16_t wdogcmp0;
56*bf01a04fSTommy Wu     uint32_t wdogcount;
57*bf01a04fSTommy Wu     uint8_t wdogunlock;
58*bf01a04fSTommy Wu };
59*bf01a04fSTommy Wu 
60*bf01a04fSTommy Wu #endif
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