xref: /openbmc/qemu/include/hw/misc/npcm7xx_mft.h (revision ffe98631)
1 /*
2  * Nuvoton NPCM7xx MFT Module
3  *
4  * Copyright 2021 Google LLC
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms of the GNU General Public License as published by the
8  * Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14  * for more details.
15  */
16 #ifndef NPCM7XX_MFT_H
17 #define NPCM7XX_MFT_H
18 
19 #include "exec/memory.h"
20 #include "hw/clock.h"
21 #include "hw/irq.h"
22 #include "hw/sysbus.h"
23 #include "qom/object.h"
24 
25 /* Max Fan input number. */
26 #define NPCM7XX_MFT_MAX_FAN_INPUT 19
27 
28 /*
29  * Number of registers in one MFT module. Don't change this without increasing
30  * the version_id in vmstate.
31  */
32 #define NPCM7XX_MFT_NR_REGS (0x20 / sizeof(uint16_t))
33 
34 /*
35  * The MFT can take up to 4 inputs: A0, B0, A1, B1. It can measure one A and one
36  * B simultaneously. NPCM7XX_MFT_INASEL and NPCM7XX_MFT_INBSEL are used to
37  * select which A or B input are used.
38  */
39 #define NPCM7XX_MFT_FANIN_COUNT 4
40 
41 /**
42  * struct NPCM7xxMFTState - Multi Functional Tachometer device state.
43  * @parent: System bus device.
44  * @iomem: Memory region through which registers are accessed.
45  * @clock_in: The input clock for MFT from CLK module.
46  * @clock_{1,2}: The counter clocks for NPCM7XX_MFT_CNT{1,2}
47  * @irq: The IRQ for this MFT state.
48  * @regs: The MMIO registers.
49  * @max_rpm: The maximum rpm for fans. Order: A0, B0, A1, B1.
50  * @duty: The duty cycles for fans, relative to NPCM7XX_PWM_MAX_DUTY.
51  */
52 struct NPCM7xxMFTState {
53     SysBusDevice parent;
54 
55     MemoryRegion iomem;
56 
57     Clock       *clock_in;
58     Clock       *clock_1, *clock_2;
59     qemu_irq    irq;
60     uint16_t    regs[NPCM7XX_MFT_NR_REGS];
61 
62     uint32_t    max_rpm[NPCM7XX_MFT_FANIN_COUNT];
63     uint32_t    duty[NPCM7XX_MFT_FANIN_COUNT];
64 };
65 
66 #define TYPE_NPCM7XX_MFT "npcm7xx-mft"
67 OBJECT_DECLARE_SIMPLE_TYPE(NPCM7xxMFTState, NPCM7XX_MFT)
68 
69 #endif /* NPCM7XX_MFT_H */
70