xref: /openbmc/qemu/include/hw/misc/mps2-fpgaio.h (revision ffe98631)
1 /*
2  * ARM MPS2 FPGAIO emulation
3  *
4  * Copyright (c) 2018 Linaro Limited
5  * Written by Peter Maydell
6  *
7  *  This program is free software; you can redistribute it and/or modify
8  *  it under the terms of the GNU General Public License version 2 or
9  *  (at your option) any later version.
10  */
11 
12 /* This is a model of the FPGAIO register block in the AN505
13  * FPGA image for the MPS2 dev board; it is documented in the
14  * application note:
15  * https://developer.arm.com/documentation/dai0505/latest/
16  *
17  * QEMU interface:
18  *  + sysbus MMIO region 0: the register bank
19  */
20 
21 #ifndef MPS2_FPGAIO_H
22 #define MPS2_FPGAIO_H
23 
24 #include "hw/sysbus.h"
25 #include "hw/misc/led.h"
26 #include "qom/object.h"
27 
28 #define TYPE_MPS2_FPGAIO "mps2-fpgaio"
29 OBJECT_DECLARE_SIMPLE_TYPE(MPS2FPGAIO, MPS2_FPGAIO)
30 
31 #define MPS2FPGAIO_MAX_LEDS 32
32 
33 struct MPS2FPGAIO {
34     /*< private >*/
35     SysBusDevice parent_obj;
36 
37     /*< public >*/
38     MemoryRegion iomem;
39     LEDState *led[MPS2FPGAIO_MAX_LEDS];
40     uint32_t num_leds;
41     bool has_switches;
42     bool has_dbgctrl;
43 
44     uint32_t led0;
45     uint32_t prescale;
46     uint32_t misc;
47     uint32_t dbgctrl;
48 
49     /* QEMU_CLOCK_VIRTUAL time at which counter and pscntr were last synced */
50     int64_t pscntr_sync_ticks;
51     /* Values of COUNTER and PSCNTR at time pscntr_sync_ticks */
52     uint32_t counter;
53     uint32_t pscntr;
54 
55     uint32_t prescale_clk;
56 
57     /* These hold the CLOCK_VIRTUAL ns tick when the CLK1HZ/CLK100HZ was zero */
58     int64_t clk1hz_tick_offset;
59     int64_t clk100hz_tick_offset;
60 };
61 
62 #endif
63