1 /* 2 * ARM MPS2 FPGAIO emulation 3 * 4 * Copyright (c) 2018 Linaro Limited 5 * Written by Peter Maydell 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 or 9 * (at your option) any later version. 10 */ 11 12 /* This is a model of the FPGAIO register block in the AN505 13 * FPGA image for the MPS2 dev board; it is documented in the 14 * application note: 15 * http://infocenter.arm.com/help/topic/com.arm.doc.dai0505b/index.html 16 * 17 * QEMU interface: 18 * + sysbus MMIO region 0: the register bank 19 */ 20 21 #ifndef MPS2_FPGAIO_H 22 #define MPS2_FPGAIO_H 23 24 #include "hw/sysbus.h" 25 #include "qom/object.h" 26 27 #define TYPE_MPS2_FPGAIO "mps2-fpgaio" 28 OBJECT_DECLARE_SIMPLE_TYPE(MPS2FPGAIO, MPS2_FPGAIO) 29 30 struct MPS2FPGAIO { 31 /*< private >*/ 32 SysBusDevice parent_obj; 33 34 /*< public >*/ 35 MemoryRegion iomem; 36 37 uint32_t led0; 38 uint32_t prescale; 39 uint32_t misc; 40 41 /* QEMU_CLOCK_VIRTUAL time at which counter and pscntr were last synced */ 42 int64_t pscntr_sync_ticks; 43 /* Values of COUNTER and PSCNTR at time pscntr_sync_ticks */ 44 uint32_t counter; 45 uint32_t pscntr; 46 47 uint32_t prescale_clk; 48 49 /* These hold the CLOCK_VIRTUAL ns tick when the CLK1HZ/CLK100HZ was zero */ 50 int64_t clk1hz_tick_offset; 51 int64_t clk100hz_tick_offset; 52 }; 53 54 #endif 55