xref: /openbmc/qemu/include/hw/misc/mips_itu.h (revision c734cd40)
1 /*
2  * Inter-Thread Communication Unit emulation.
3  *
4  * Copyright (c) 2016 Imagination Technologies
5  *
6  * This library is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU Lesser General Public
8  * License as published by the Free Software Foundation; either
9  * version 2 of the License, or (at your option) any later version.
10  *
11  * This library is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * Lesser General Public License for more details.
15  *
16  * You should have received a copy of the GNU Lesser General Public
17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18  */
19 
20 #ifndef MIPS_ITU_H
21 #define MIPS_ITU_H
22 
23 #include "hw/sysbus.h"
24 #include "qom/object.h"
25 
26 #define TYPE_MIPS_ITU "mips-itu"
27 typedef struct MIPSITUState MIPSITUState;
28 DECLARE_INSTANCE_CHECKER(MIPSITUState, MIPS_ITU,
29                          TYPE_MIPS_ITU)
30 
31 #define ITC_CELL_DEPTH_SHIFT 2
32 #define ITC_CELL_DEPTH (1u << ITC_CELL_DEPTH_SHIFT)
33 
34 typedef struct ITCStorageCell {
35     struct {
36         uint8_t FIFODepth; /* Log2 of the cell depth */
37         uint8_t FIFOPtr; /* Number of elements in a FIFO cell */
38         uint8_t FIFO; /* 1 - FIFO cell, 0 - Semaphore cell */
39         uint8_t T; /* Trap Bit */
40         uint8_t F; /* Full Bit */
41         uint8_t E; /* Empty Bit */
42     } tag;
43 
44     /* Index of the oldest element in the queue */
45     uint8_t fifo_out;
46 
47     /* Circular buffer for FIFO. Semaphore cells use index 0 only */
48     uint64_t data[ITC_CELL_DEPTH];
49 
50     /* Bitmap tracking blocked threads on the cell.
51        TODO: support >64 threads ? */
52     uint64_t blocked_threads;
53 } ITCStorageCell;
54 
55 #define ITC_ADDRESSMAP_NUM 2
56 
57 struct MIPSITUState {
58     /*< private >*/
59     SysBusDevice parent_obj;
60     /*< public >*/
61 
62     int32_t num_fifo;
63     int32_t num_semaphores;
64 
65     /* ITC Storage */
66     ITCStorageCell *cell;
67     MemoryRegion storage_io;
68 
69     /* ITC Configuration Tags */
70     uint64_t ITCAddressMap[ITC_ADDRESSMAP_NUM];
71     MemoryRegion tag_io;
72 
73     /* ITU Control Register */
74     uint64_t icr0;
75 
76     /* SAAR */
77     bool saar_present;
78     void *saar;
79 
80 };
81 
82 /* Get ITC Configuration Tag memory region. */
83 MemoryRegion *mips_itu_get_tag_region(MIPSITUState *itu);
84 
85 #endif /* MIPS_ITU_H */
86