1 /* 2 * Definitions for talking to the PMU. The PMU is a microcontroller 3 * which controls battery charging and system power on PowerBook 3400 4 * and 2400 models as well as the RTC and various other things. 5 * 6 * Copyright (C) 1998 Paul Mackerras. 7 * Copyright (C) 2016 Ben Herrenschmidt 8 */ 9 10 #ifndef PMU_H 11 #define PMU_H 12 13 /* 14 * PMU commands 15 */ 16 17 #define PMU_POWER_CTRL0 0x10 /* control power of some devices */ 18 #define PMU_POWER_CTRL 0x11 /* control power of some devices */ 19 #define PMU_ADB_CMD 0x20 /* send ADB packet */ 20 #define PMU_ADB_POLL_OFF 0x21 /* disable ADB auto-poll */ 21 #define PMU_WRITE_NVRAM 0x33 /* write non-volatile RAM */ 22 #define PMU_READ_NVRAM 0x3b /* read non-volatile RAM */ 23 #define PMU_SET_RTC 0x30 /* set real-time clock */ 24 #define PMU_READ_RTC 0x38 /* read real-time clock */ 25 #define PMU_SET_VOLBUTTON 0x40 /* set volume up/down position */ 26 #define PMU_BACKLIGHT_BRIGHT 0x41 /* set backlight brightness */ 27 #define PMU_GET_VOLBUTTON 0x48 /* get volume up/down position */ 28 #define PMU_PCEJECT 0x4c /* eject PC-card from slot */ 29 #define PMU_BATTERY_STATE 0x6b /* report battery state etc. */ 30 #define PMU_SMART_BATTERY_STATE 0x6f /* report battery state (new way) */ 31 #define PMU_SET_INTR_MASK 0x70 /* set PMU interrupt mask */ 32 #define PMU_INT_ACK 0x78 /* read interrupt bits */ 33 #define PMU_SHUTDOWN 0x7e /* turn power off */ 34 #define PMU_CPU_SPEED 0x7d /* control CPU speed on some models */ 35 #define PMU_SLEEP 0x7f /* put CPU to sleep */ 36 #define PMU_POWER_EVENTS 0x8f /* Send power-event commands to PMU */ 37 #define PMU_I2C_CMD 0x9a /* I2C operations */ 38 #define PMU_RESET 0xd0 /* reset CPU */ 39 #define PMU_GET_BRIGHTBUTTON 0xd9 /* report brightness up/down pos */ 40 #define PMU_GET_COVER 0xdc /* report cover open/closed */ 41 #define PMU_SYSTEM_READY 0xdf /* tell PMU we are awake */ 42 #define PMU_DOWNLOAD_STATUS 0xe2 /* Called by MacOS during boot... */ 43 #define PMU_READ_PMU_RAM 0xe8 /* read the PMU RAM... ??? */ 44 #define PMU_GET_VERSION 0xea /* read the PMU version */ 45 46 /* Bits to use with the PMU_POWER_CTRL0 command */ 47 #define PMU_POW0_ON 0x80 /* OR this to power ON the device */ 48 #define PMU_POW0_OFF 0x00 /* leave bit 7 to 0 to power it OFF */ 49 #define PMU_POW0_HARD_DRIVE 0x04 /* Hard drive power 50 * (on wallstreet/lombard ?) */ 51 52 /* Bits to use with the PMU_POWER_CTRL command */ 53 #define PMU_POW_ON 0x80 /* OR this to power ON the device */ 54 #define PMU_POW_OFF 0x00 /* leave bit 7 to 0 to power it OFF */ 55 #define PMU_POW_BACKLIGHT 0x01 /* backlight power */ 56 #define PMU_POW_CHARGER 0x02 /* battery charger power */ 57 #define PMU_POW_IRLED 0x04 /* IR led power (on wallstreet) */ 58 #define PMU_POW_MEDIABAY 0x08 /* media bay power 59 * (wallstreet/lombard ?) */ 60 61 /* Bits in PMU interrupt and interrupt mask bytes */ 62 #define PMU_INT_PCEJECT 0x04 /* PC-card eject buttons */ 63 #define PMU_INT_SNDBRT 0x08 /* sound/brightness up/down buttons */ 64 #define PMU_INT_ADB 0x10 /* ADB autopoll or reply data */ 65 #define PMU_INT_BATTERY 0x20 /* Battery state change */ 66 #define PMU_INT_ENVIRONMENT 0x40 /* Environment interrupts */ 67 #define PMU_INT_TICK 0x80 /* 1-second tick interrupt */ 68 69 /* Other bits in PMU interrupt valid when PMU_INT_ADB is set */ 70 #define PMU_INT_ADB_AUTO 0x04 /* ADB autopoll, when PMU_INT_ADB */ 71 #define PMU_INT_WAITING_CHARGER 0x01 /* ??? */ 72 #define PMU_INT_AUTO_SRQ_POLL 0x02 /* ??? */ 73 74 /* Bits in the environement message (either obtained via PMU_GET_COVER, 75 * or via PMU_INT_ENVIRONMENT on core99 */ 76 #define PMU_ENV_LID_CLOSED 0x01 /* The lid is closed */ 77 78 /* I2C related definitions */ 79 #define PMU_I2C_MODE_SIMPLE 0 80 #define PMU_I2C_MODE_STDSUB 1 81 #define PMU_I2C_MODE_COMBINED 2 82 83 #define PMU_I2C_BUS_STATUS 0 84 #define PMU_I2C_BUS_SYSCLK 1 85 #define PMU_I2C_BUS_POWER 2 86 87 #define PMU_I2C_STATUS_OK 0 88 #define PMU_I2C_STATUS_DATAREAD 1 89 #define PMU_I2C_STATUS_BUSY 0xfe 90 91 /* Kind of PMU (model) */ 92 enum { 93 PMU_UNKNOWN, 94 PMU_OHARE_BASED, /* 2400, 3400, 3500 (old G3 powerbook) */ 95 PMU_HEATHROW_BASED, /* PowerBook G3 series */ 96 PMU_PADDINGTON_BASED, /* 1999 PowerBook G3 */ 97 PMU_KEYLARGO_BASED, /* Core99 motherboard (PMU99) */ 98 PMU_68K_V1, /* 68K PMU, version 1 */ 99 PMU_68K_V2, /* 68K PMU, version 2 */ 100 }; 101 102 /* PMU PMU_POWER_EVENTS commands */ 103 enum { 104 PMU_PWR_GET_POWERUP_EVENTS = 0x00, 105 PMU_PWR_SET_POWERUP_EVENTS = 0x01, 106 PMU_PWR_CLR_POWERUP_EVENTS = 0x02, 107 PMU_PWR_GET_WAKEUP_EVENTS = 0x03, 108 PMU_PWR_SET_WAKEUP_EVENTS = 0x04, 109 PMU_PWR_CLR_WAKEUP_EVENTS = 0x05, 110 }; 111 112 /* Power events wakeup bits */ 113 enum { 114 PMU_PWR_WAKEUP_KEY = 0x01, /* Wake on key press */ 115 PMU_PWR_WAKEUP_AC_INSERT = 0x02, /* Wake on AC adapter plug */ 116 PMU_PWR_WAKEUP_AC_CHANGE = 0x04, 117 PMU_PWR_WAKEUP_LID_OPEN = 0x08, 118 PMU_PWR_WAKEUP_RING = 0x10, 119 }; 120 121 /* 122 * This table indicates for each PMU opcode: 123 * - the number of data bytes to be sent with the command, or -1 124 * if a length byte should be sent, 125 * - the number of response bytes which the PMU will return, or 126 * -1 if it will send a length byte. 127 */ 128 129 static const int8_t pmu_data_len[256][2] = { 130 /* 0 1 2 3 4 5 6 7 */ 131 {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 132 {-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1}, 133 { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 134 { 0, 1},{ 0, 1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{ 0, 0}, 135 {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0}, 136 { 0, -1},{ 0, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{ 0, -1}, 137 { 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 138 { 0, 4},{ 0, 20},{ 2, -1},{ 2, 1},{ 3, -1},{-1, -1},{-1, -1},{ 4, 0}, 139 { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 140 { 0, 1},{ 0, 1},{-1, -1},{ 1, 0},{ 1, 0},{-1, -1},{-1, -1},{-1, -1}, 141 { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0}, 142 { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0, -1},{-1, -1},{-1, -1},{-1, -1}, 143 { 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 144 { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0, -1},{ 0, -1},{-1, -1},{-1, -1}, 145 { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 146 { 0, -1},{ 0, -1},{-1, -1},{-1, -1},{-1, -1},{ 5, 1},{ 4, 1},{ 4, 1}, 147 { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 148 { 0, 5},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1}, 149 { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 150 { 0, 1},{ 0, 1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1}, 151 { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0}, 152 { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1, -1},{-1, -1},{-1, -1},{-1, -1}, 153 {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 154 {-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1}, 155 {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 156 {-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1}, 157 { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 158 { 1, 1},{ 1, 1},{-1, -1},{-1, -1},{ 0, 1},{ 0, -1},{-1, -1},{-1, -1}, 159 {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0}, 160 { 3, -1},{-1, -1},{ 0, 1},{-1, -1},{ 0, -1},{-1, -1},{-1, -1},{ 0, 0}, 161 {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, 162 {-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1}, 163 }; 164 165 /* Command protocol state machine */ 166 typedef enum { 167 pmu_state_idle, /* Waiting for command */ 168 pmu_state_cmd, /* Receiving command */ 169 pmu_state_rsp, /* Responding to command */ 170 } PMUCmdState; 171 172 /* MOS6522 PMU */ 173 typedef struct MOS6522PMUState { 174 /*< private >*/ 175 MOS6522State parent_obj; 176 } MOS6522PMUState; 177 178 #define TYPE_MOS6522_PMU "mos6522-pmu" 179 #define MOS6522_PMU(obj) OBJECT_CHECK(MOS6522PMUState, (obj), \ 180 TYPE_MOS6522_PMU) 181 /** 182 * PMUState: 183 * @last_b: last value of B register 184 */ 185 186 typedef struct PMUState { 187 /*< private >*/ 188 SysBusDevice parent_obj; 189 /*< public >*/ 190 191 MemoryRegion mem; 192 uint64_t frequency; 193 qemu_irq via_irq; 194 bool via_irq_state; 195 196 /* PMU state */ 197 MOS6522PMUState mos6522_pmu; 198 199 /* PMU low level protocol state */ 200 PMUCmdState cmd_state; 201 uint8_t last_b; 202 uint8_t cmd; 203 uint32_t cmdlen; 204 uint32_t rsplen; 205 uint8_t cmd_buf_pos; 206 uint8_t cmd_buf[128]; 207 uint8_t cmd_rsp_pos; 208 uint8_t cmd_rsp_sz; 209 uint8_t cmd_rsp[128]; 210 211 /* PMU events/interrupts */ 212 uint8_t intbits; 213 uint8_t intmask; 214 215 /* ADB */ 216 bool has_adb; 217 ADBBusState adb_bus; 218 uint16_t adb_poll_mask; 219 uint8_t autopoll_rate_ms; 220 uint8_t autopoll_mask; 221 QEMUTimer *adb_poll_timer; 222 uint8_t adb_reply_size; 223 uint8_t adb_reply[ADB_MAX_OUT_LEN]; 224 225 /* RTC */ 226 uint32_t tick_offset; 227 QEMUTimer *one_sec_timer; 228 int64_t one_sec_target; 229 230 /* GPIO */ 231 MacIOGPIOState *gpio; 232 } PMUState; 233 234 #define TYPE_VIA_PMU "via-pmu" 235 #define VIA_PMU(obj) OBJECT_CHECK(PMUState, (obj), TYPE_VIA_PMU) 236 237 #endif /* PMU_H */ 238