xref: /openbmc/qemu/include/hw/misc/macio/cuda.h (revision ba632924)
1 /*
2  * QEMU PowerMac CUDA device support
3  *
4  * Copyright (c) 2004-2007 Fabrice Bellard
5  * Copyright (c) 2007 Jocelyn Mayer
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining a copy
8  * of this software and associated documentation files (the "Software"), to deal
9  * in the Software without restriction, including without limitation the rights
10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11  * copies of the Software, and to permit persons to whom the Software is
12  * furnished to do so, subject to the following conditions:
13  *
14  * The above copyright notice and this permission notice shall be included in
15  * all copies or substantial portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23  * THE SOFTWARE.
24  */
25 
26 #ifndef CUDA_H
27 #define CUDA_H
28 
29 /* CUDA commands (2nd byte) */
30 #define CUDA_WARM_START                0x0
31 #define CUDA_AUTOPOLL                  0x1
32 #define CUDA_GET_6805_ADDR             0x2
33 #define CUDA_GET_TIME                  0x3
34 #define CUDA_GET_PRAM                  0x7
35 #define CUDA_SET_6805_ADDR             0x8
36 #define CUDA_SET_TIME                  0x9
37 #define CUDA_POWERDOWN                 0xa
38 #define CUDA_POWERUP_TIME              0xb
39 #define CUDA_SET_PRAM                  0xc
40 #define CUDA_MS_RESET                  0xd
41 #define CUDA_SEND_DFAC                 0xe
42 #define CUDA_BATTERY_SWAP_SENSE        0x10
43 #define CUDA_RESET_SYSTEM              0x11
44 #define CUDA_SET_IPL                   0x12
45 #define CUDA_FILE_SERVER_FLAG          0x13
46 #define CUDA_SET_AUTO_RATE             0x14
47 #define CUDA_GET_AUTO_RATE             0x16
48 #define CUDA_SET_DEVICE_LIST           0x19
49 #define CUDA_GET_DEVICE_LIST           0x1a
50 #define CUDA_SET_ONE_SECOND_MODE       0x1b
51 #define CUDA_SET_POWER_MESSAGES        0x21
52 #define CUDA_GET_SET_IIC               0x22
53 #define CUDA_WAKEUP                    0x23
54 #define CUDA_TIMER_TICKLE              0x24
55 #define CUDA_COMBINED_FORMAT_IIC       0x25
56 
57 
58 /* MOS6522 CUDA */
59 typedef struct MOS6522CUDAState {
60     /*< private >*/
61     MOS6522State parent_obj;
62 } MOS6522CUDAState;
63 
64 #define TYPE_MOS6522_CUDA "mos6522-cuda"
65 #define MOS6522_CUDA(obj) OBJECT_CHECK(MOS6522CUDAState, (obj), \
66                                        TYPE_MOS6522_CUDA)
67 
68 /* Cuda */
69 #define TYPE_CUDA "cuda"
70 #define CUDA(obj) OBJECT_CHECK(CUDAState, (obj), TYPE_CUDA)
71 
72 typedef struct CUDAState {
73     /*< private >*/
74     SysBusDevice parent_obj;
75     /*< public >*/
76     MemoryRegion mem;
77 
78     ADBBusState adb_bus;
79     MOS6522CUDAState mos6522_cuda;
80 
81     uint32_t tick_offset;
82     uint64_t tb_frequency;
83 
84     uint8_t last_b;
85     uint8_t last_acr;
86 
87     /* MacOS 9 is racy and requires a delay upon setting the SR_INT bit */
88     uint64_t sr_delay_ns;
89     QEMUTimer *sr_delay_timer;
90 
91     int data_in_size;
92     int data_in_index;
93     int data_out_index;
94 
95     qemu_irq irq;
96     uint16_t adb_poll_mask;
97     uint8_t autopoll_rate_ms;
98     uint8_t autopoll;
99     uint8_t data_in[128];
100     uint8_t data_out[16];
101     QEMUTimer *adb_poll_timer;
102 } CUDAState;
103 
104 #endif /* CUDA_H */
105