xref: /openbmc/qemu/include/hw/misc/imx31_ccm.h (revision 750541c4)
1 /*
2  * IMX31 Clock Control Module
3  *
4  * Copyright (C) 2012 NICTA
5  * Updated by Jean-Christophe Dubois <jcd@tribudubois.net>
6  *
7  * This work is licensed under the terms of the GNU GPL, version 2 or later.
8  * See the COPYING file in the top-level directory.
9  */
10 
11 #ifndef IMX31_CCM_H
12 #define IMX31_CCM_H
13 
14 #include "hw/misc/imx_ccm.h"
15 
16 #define IMX31_CCM_CCMR_REG  0
17 #define IMX31_CCM_PDR0_REG  1
18 #define IMX31_CCM_PDR1_REG  2
19 #define IMX31_CCM_RCSR_REG  3
20 #define IMX31_CCM_MPCTL_REG 4
21 #define IMX31_CCM_UPCTL_REG 5
22 #define IMX31_CCM_SPCTL_REG 6
23 #define IMX31_CCM_COSR_REG  7
24 #define IMX31_CCM_CGR0_REG  8
25 #define IMX31_CCM_CGR1_REG  9
26 #define IMX31_CCM_CGR2_REG  10
27 #define IMX31_CCM_WIMR_REG  11
28 #define IMX31_CCM_LDC_REG   12
29 #define IMX31_CCM_DCVR0_REG 13
30 #define IMX31_CCM_DCVR1_REG 14
31 #define IMX31_CCM_DCVR2_REG 15
32 #define IMX31_CCM_DCVR3_REG 16
33 #define IMX31_CCM_LTR0_REG  17
34 #define IMX31_CCM_LTR1_REG  18
35 #define IMX31_CCM_LTR2_REG  19
36 #define IMX31_CCM_LTR3_REG  20
37 #define IMX31_CCM_LTBR0_REG 21
38 #define IMX31_CCM_LTBR1_REG 22
39 #define IMX31_CCM_PMCR0_REG 23
40 #define IMX31_CCM_PMCR1_REG 24
41 #define IMX31_CCM_PDR2_REG  25
42 #define IMX31_CCM_MAX_REG   26
43 
44 /* CCMR */
45 #define CCMR_FPME    (1<<0)
46 #define CCMR_MPE     (1<<3)
47 #define CCMR_MDS     (1<<7)
48 #define CCMR_FPMF    (1<<26)
49 #define CCMR_PRCS    (3<<1)
50 
51 #define PMCR0_DFSUP1 (1<<31)
52 
53 /* PDR0 */
54 #define PDR0_MCU_PODF_SHIFT (0)
55 #define PDR0_MCU_PODF_MASK (0x7)
56 #define PDR0_MAX_PODF_SHIFT (3)
57 #define PDR0_MAX_PODF_MASK (0x7)
58 #define PDR0_IPG_PODF_SHIFT (6)
59 #define PDR0_IPG_PODF_MASK (0x3)
60 #define PDR0_NFC_PODF_SHIFT (8)
61 #define PDR0_NFC_PODF_MASK (0x7)
62 #define PDR0_HSP_PODF_SHIFT (11)
63 #define PDR0_HSP_PODF_MASK (0x7)
64 #define PDR0_PER_PODF_SHIFT (16)
65 #define PDR0_PER_PODF_MASK (0x1f)
66 #define PDR0_CSI_PODF_SHIFT (23)
67 #define PDR0_CSI_PODF_MASK (0x1ff)
68 
69 #define EXTRACT(value, name) (((value) >> PDR0_##name##_PODF_SHIFT) \
70                               & PDR0_##name##_PODF_MASK)
71 #define INSERT(value, name) (((value) & PDR0_##name##_PODF_MASK) << \
72                              PDR0_##name##_PODF_SHIFT)
73 
74 #define TYPE_IMX31_CCM "imx31.ccm"
75 #define IMX31_CCM(obj) OBJECT_CHECK(IMX31CCMState, (obj), TYPE_IMX31_CCM)
76 
77 typedef struct IMX31CCMState {
78     /* <private> */
79     IMXCCMState parent_obj;
80 
81     /* <public> */
82     MemoryRegion iomem;
83 
84     uint32_t reg[IMX31_CCM_MAX_REG];
85 
86 } IMX31CCMState;
87 
88 #endif /* IMX31_CCM_H */
89