xref: /openbmc/qemu/include/hw/misc/imx31_ccm.h (revision 15eafc2e)
1 /*
2  * IMX31 Clock Control Module
3  *
4  * Copyright (C) 2012 NICTA
5  * Updated by Jean-Christophe Dubois <jcd@tribudubois.net>
6  *
7  * This work is licensed under the terms of the GNU GPL, version 2 or later.
8  * See the COPYING file in the top-level directory.
9  */
10 
11 #ifndef IMX31_CCM_H
12 #define IMX31_CCM_H
13 
14 #include "hw/misc/imx_ccm.h"
15 
16 /* CCMR */
17 #define CCMR_FPME    (1<<0)
18 #define CCMR_MPE     (1<<3)
19 #define CCMR_MDS     (1<<7)
20 #define CCMR_FPMF    (1<<26)
21 #define CCMR_PRCS    (3<<1)
22 
23 #define PMCR0_DFSUP1 (1<<31)
24 
25 /* PDR0 */
26 #define PDR0_MCU_PODF_SHIFT (0)
27 #define PDR0_MCU_PODF_MASK (0x7)
28 #define PDR0_MAX_PODF_SHIFT (3)
29 #define PDR0_MAX_PODF_MASK (0x7)
30 #define PDR0_IPG_PODF_SHIFT (6)
31 #define PDR0_IPG_PODF_MASK (0x3)
32 #define PDR0_NFC_PODF_SHIFT (8)
33 #define PDR0_NFC_PODF_MASK (0x7)
34 #define PDR0_HSP_PODF_SHIFT (11)
35 #define PDR0_HSP_PODF_MASK (0x7)
36 #define PDR0_PER_PODF_SHIFT (16)
37 #define PDR0_PER_PODF_MASK (0x1f)
38 #define PDR0_CSI_PODF_SHIFT (23)
39 #define PDR0_CSI_PODF_MASK (0x1ff)
40 
41 #define EXTRACT(value, name) (((value) >> PDR0_##name##_PODF_SHIFT) \
42                               & PDR0_##name##_PODF_MASK)
43 #define INSERT(value, name) (((value) & PDR0_##name##_PODF_MASK) << \
44                              PDR0_##name##_PODF_SHIFT)
45 
46 #define TYPE_IMX31_CCM "imx31.ccm"
47 #define IMX31_CCM(obj) OBJECT_CHECK(IMX31CCMState, (obj), TYPE_IMX31_CCM)
48 
49 typedef struct IMX31CCMState {
50     /* <private> */
51     IMXCCMState parent_obj;
52 
53     /* <public> */
54     MemoryRegion iomem;
55 
56     uint32_t ccmr;
57     uint32_t pdr0;
58     uint32_t pdr1;
59     uint32_t mpctl;
60     uint32_t spctl;
61     uint32_t cgr[3];
62     uint32_t pmcr0;
63     uint32_t pmcr1;
64 } IMX31CCMState;
65 
66 #endif /* IMX31_CCM_H */
67