xref: /openbmc/qemu/include/hw/misc/auxbus.h (revision 1538d763)
1 /*
2  * auxbus.h
3  *
4  *  Copyright (C)2014 : GreenSocs Ltd
5  *      http://www.greensocs.com/ , email: info@greensocs.com
6  *
7  *  Developed by :
8  *  Frederic Konrad   <fred.konrad@greensocs.com>
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License as published by
12  * the Free Software Foundation, either version 2 of the License, or
13  * (at your option)any later version.
14  *
15  * This program is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18  * GNU General Public License for more details.
19  *
20  * You should have received a copy of the GNU General Public License along
21  * with this program; if not, see <http://www.gnu.org/licenses/>.
22  *
23  */
24 
25 #ifndef HW_MISC_AUXBUS_H
26 #define HW_MISC_AUXBUS_H
27 
28 #include "exec/memory.h"
29 #include "hw/qdev-core.h"
30 
31 typedef struct AUXBus AUXBus;
32 typedef struct AUXSlave AUXSlave;
33 typedef enum AUXCommand AUXCommand;
34 typedef enum AUXReply AUXReply;
35 
36 #define TYPE_AUXTOI2C "aux-to-i2c-bridge"
37 typedef struct AUXTOI2CState AUXTOI2CState;
38 #define AUXTOI2C(obj) OBJECT_CHECK(AUXTOI2CState, (obj), TYPE_AUXTOI2C)
39 
40 enum AUXCommand {
41     WRITE_I2C = 0,
42     READ_I2C = 1,
43     WRITE_I2C_STATUS = 2,
44     WRITE_I2C_MOT = 4,
45     READ_I2C_MOT = 5,
46     WRITE_AUX = 8,
47     READ_AUX = 9
48 };
49 
50 enum AUXReply {
51     AUX_I2C_ACK = 0,
52     AUX_NACK = 1,
53     AUX_DEFER = 2,
54     AUX_I2C_NACK = 4,
55     AUX_I2C_DEFER = 8
56 };
57 
58 #define TYPE_AUX_BUS "aux-bus"
59 #define AUX_BUS(obj) OBJECT_CHECK(AUXBus, (obj), TYPE_AUX_BUS)
60 
61 struct AUXBus {
62     /* < private > */
63     BusState qbus;
64 
65     /* < public > */
66     AUXSlave *current_dev;
67     AUXSlave *dev;
68     uint32_t last_i2c_address;
69     AUXCommand last_transaction;
70 
71     AUXTOI2CState *bridge;
72 
73     MemoryRegion *aux_io;
74     AddressSpace aux_addr_space;
75 };
76 
77 #define TYPE_AUX_SLAVE "aux-slave"
78 #define AUX_SLAVE(obj) \
79      OBJECT_CHECK(AUXSlave, (obj), TYPE_AUX_SLAVE)
80 
81 struct AUXSlave {
82     /* < private > */
83     DeviceState parent_obj;
84 
85     /* < public > */
86     MemoryRegion *mmio;
87 };
88 
89 /**
90  * aux_bus_init: Initialize an AUX bus.
91  *
92  * Returns the new AUX bus created.
93  *
94  * @parent The device where this bus is located.
95  * @name The name of the bus.
96  */
97 AUXBus *aux_bus_init(DeviceState *parent, const char *name);
98 
99 /**
100  * aux_bus_realize: Realize an AUX bus.
101  *
102  * @bus: The AUX bus.
103  */
104 void aux_bus_realize(AUXBus *bus);
105 
106 /*
107  * aux_request: Make a request on the bus.
108  *
109  * Returns the reply of the request.
110  *
111  * @bus Ths bus where the request happen.
112  * @cmd The command requested.
113  * @address The 20bits address of the slave.
114  * @len The length of the read or write.
115  * @data The data array which will be filled or read during transfer.
116  */
117 AUXReply aux_request(AUXBus *bus, AUXCommand cmd, uint32_t address,
118                               uint8_t len, uint8_t *data);
119 
120 /*
121  * aux_get_i2c_bus: Get the i2c bus for I2C over AUX command.
122  *
123  * Returns the i2c bus associated to this AUX bus.
124  *
125  * @bus The AUX bus.
126  */
127 I2CBus *aux_get_i2c_bus(AUXBus *bus);
128 
129 /*
130  * aux_init_mmio: Init an mmio for an AUX slave.
131  *
132  * @aux_slave The AUX slave.
133  * @mmio The mmio to be registered.
134  */
135 void aux_init_mmio(AUXSlave *aux_slave, MemoryRegion *mmio);
136 
137 /* aux_map_slave: Map the mmio for an AUX slave on the bus.
138  *
139  * @dev The AUX slave.
140  * @addr The address for the slave's mmio.
141  */
142 void aux_map_slave(AUXSlave *dev, hwaddr addr);
143 
144 #endif /* HW_MISC_AUXBUS_H */
145