xref: /openbmc/qemu/include/hw/misc/auxbus.h (revision 135b03cb)
1 /*
2  * auxbus.h
3  *
4  *  Copyright (C)2014 : GreenSocs Ltd
5  *      http://www.greensocs.com/ , email: info@greensocs.com
6  *
7  *  Developed by :
8  *  Frederic Konrad   <fred.konrad@greensocs.com>
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License as published by
12  * the Free Software Foundation, either version 2 of the License, or
13  * (at your option)any later version.
14  *
15  * This program is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18  * GNU General Public License for more details.
19  *
20  * You should have received a copy of the GNU General Public License along
21  * with this program; if not, see <http://www.gnu.org/licenses/>.
22  *
23  */
24 
25 #ifndef HW_MISC_AUXBUS_H
26 #define HW_MISC_AUXBUS_H
27 
28 #include "exec/memory.h"
29 #include "hw/qdev-core.h"
30 
31 typedef struct AUXBus AUXBus;
32 typedef struct AUXSlave AUXSlave;
33 typedef enum AUXCommand AUXCommand;
34 typedef enum AUXReply AUXReply;
35 typedef struct AUXTOI2CState AUXTOI2CState;
36 
37 enum AUXCommand {
38     WRITE_I2C = 0,
39     READ_I2C = 1,
40     WRITE_I2C_STATUS = 2,
41     WRITE_I2C_MOT = 4,
42     READ_I2C_MOT = 5,
43     WRITE_AUX = 8,
44     READ_AUX = 9
45 };
46 
47 enum AUXReply {
48     AUX_I2C_ACK = 0,
49     AUX_NACK = 1,
50     AUX_DEFER = 2,
51     AUX_I2C_NACK = 4,
52     AUX_I2C_DEFER = 8
53 };
54 
55 #define TYPE_AUX_BUS "aux-bus"
56 #define AUX_BUS(obj) OBJECT_CHECK(AUXBus, (obj), TYPE_AUX_BUS)
57 
58 struct AUXBus {
59     /* < private > */
60     BusState qbus;
61 
62     /* < public > */
63     AUXSlave *current_dev;
64     AUXSlave *dev;
65     uint32_t last_i2c_address;
66     AUXCommand last_transaction;
67 
68     AUXTOI2CState *bridge;
69 
70     MemoryRegion *aux_io;
71     AddressSpace aux_addr_space;
72 };
73 
74 #define TYPE_AUX_SLAVE "aux-slave"
75 #define AUX_SLAVE(obj) \
76      OBJECT_CHECK(AUXSlave, (obj), TYPE_AUX_SLAVE)
77 
78 struct AUXSlave {
79     /* < private > */
80     DeviceState parent_obj;
81 
82     /* < public > */
83     MemoryRegion *mmio;
84 };
85 
86 /**
87  * aux_init_bus: Initialize an AUX bus.
88  *
89  * Returns the new AUX bus created.
90  *
91  * @parent The device where this bus is located.
92  * @name The name of the bus.
93  */
94 AUXBus *aux_init_bus(DeviceState *parent, const char *name);
95 
96 /*
97  * aux_request: Make a request on the bus.
98  *
99  * Returns the reply of the request.
100  *
101  * @bus Ths bus where the request happen.
102  * @cmd The command requested.
103  * @address The 20bits address of the slave.
104  * @len The length of the read or write.
105  * @data The data array which will be filled or read during transfer.
106  */
107 AUXReply aux_request(AUXBus *bus, AUXCommand cmd, uint32_t address,
108                               uint8_t len, uint8_t *data);
109 
110 /*
111  * aux_get_i2c_bus: Get the i2c bus for I2C over AUX command.
112  *
113  * Returns the i2c bus associated to this AUX bus.
114  *
115  * @bus The AUX bus.
116  */
117 I2CBus *aux_get_i2c_bus(AUXBus *bus);
118 
119 /*
120  * aux_init_mmio: Init an mmio for an AUX slave.
121  *
122  * @aux_slave The AUX slave.
123  * @mmio The mmio to be registered.
124  */
125 void aux_init_mmio(AUXSlave *aux_slave, MemoryRegion *mmio);
126 
127 /* aux_create_slave: Create a new device on an AUX bus
128  *
129  * @bus The AUX bus for the new device.
130  * @name The type of the device to be created.
131  */
132 DeviceState *aux_create_slave(AUXBus *bus, const char *name);
133 
134 /* aux_map_slave: Map the mmio for an AUX slave on the bus.
135  *
136  * @dev The AUX slave.
137  * @addr The address for the slave's mmio.
138  */
139 void aux_map_slave(AUXSlave *dev, hwaddr addr);
140 
141 #endif /* HW_MISC_AUXBUS_H */
142