1 /* 2 * ASPEED Secure Boot Controller 3 * 4 * Copyright (C) 2021-2022 IBM Corp. 5 * 6 * SPDX-License-Identifier: GPL-2.0-or-later 7 */ 8 9 #ifndef ASPEED_SBC_H 10 #define ASPEED_SBC_H 11 12 #include "hw/sysbus.h" 13 #include "hw/nvram/aspeed_otp.h" 14 15 #define TYPE_ASPEED_SBC "aspeed.sbc" 16 #define TYPE_ASPEED_AST2600_SBC TYPE_ASPEED_SBC "-ast2600" 17 OBJECT_DECLARE_TYPE(AspeedSBCState, AspeedSBCClass, ASPEED_SBC) 18 19 #define ASPEED_SBC_NR_REGS (0x93c >> 2) 20 21 #define QSR_AES BIT(27) 22 #define QSR_RSA1024 (0x0 << 12) 23 #define QSR_RSA2048 (0x1 << 12) 24 #define QSR_RSA3072 (0x2 << 12) 25 #define QSR_RSA4096 (0x3 << 12) 26 #define QSR_SHA224 (0x0 << 10) 27 #define QSR_SHA256 (0x1 << 10) 28 #define QSR_SHA384 (0x2 << 10) 29 #define QSR_SHA512 (0x3 << 10) 30 31 struct AspeedSBCState { 32 SysBusDevice parent; 33 34 bool emmc_abr; 35 uint32_t signing_settings; 36 37 MemoryRegion iomem; 38 39 uint32_t regs[ASPEED_SBC_NR_REGS]; 40 41 AspeedOTPState otp; 42 }; 43 44 struct AspeedSBCClass { 45 SysBusDeviceClass parent_class; 46 47 bool has_otp; 48 }; 49 50 #endif /* ASPEED_SBC_H */ 51