1 /* 2 * ASPEED Secure Boot Controller 3 * 4 * Copyright (C) 2021-2022 IBM Corp. 5 * 6 * SPDX-License-Identifier: GPL-2.0-or-later 7 */ 8 9 #ifndef ASPEED_SBC_H 10 #define ASPEED_SBC_H 11 12 #include "hw/sysbus.h" 13 #include "hw/nvram/aspeed_otp.h" 14 15 #define TYPE_ASPEED_SBC "aspeed.sbc" 16 #define TYPE_ASPEED_AST2600_SBC TYPE_ASPEED_SBC "-ast2600" 17 #define TYPE_ASPEED_AST10X0_SBC TYPE_ASPEED_SBC "-ast10x0" 18 OBJECT_DECLARE_TYPE(AspeedSBCState, AspeedSBCClass, ASPEED_SBC) 19 20 #define ASPEED_SBC_NR_REGS (0x93c >> 2) 21 22 #define QSR_AES BIT(27) 23 #define QSR_RSA1024 (0x0 << 12) 24 #define QSR_RSA2048 (0x1 << 12) 25 #define QSR_RSA3072 (0x2 << 12) 26 #define QSR_RSA4096 (0x3 << 12) 27 #define QSR_SHA224 (0x0 << 10) 28 #define QSR_SHA256 (0x1 << 10) 29 #define QSR_SHA384 (0x2 << 10) 30 #define QSR_SHA512 (0x3 << 10) 31 32 struct AspeedSBCState { 33 SysBusDevice parent; 34 35 bool emmc_abr; 36 uint32_t signing_settings; 37 38 MemoryRegion iomem; 39 40 uint32_t regs[ASPEED_SBC_NR_REGS]; 41 42 AspeedOTPState otp; 43 }; 44 45 struct AspeedSBCClass { 46 SysBusDeviceClass parent_class; 47 48 bool has_otp; 49 }; 50 51 #endif /* ASPEED_SBC_H */ 52