1 /* 2 * ARM SSE-200 CPU_IDENTITY register block 3 * 4 * Copyright (c) 2019 Linaro Limited 5 * Written by Peter Maydell 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 or 9 * (at your option) any later version. 10 */ 11 12 /* 13 * This is a model of the "CPU_IDENTITY" register block which is part of the 14 * Arm SSE-200 and documented in 15 * http://infocenter.arm.com/help/topic/com.arm.doc.101104_0100_00_en/corelink_sse200_subsystem_for_embedded_technical_reference_manual_101104_0100_00_en.pdf 16 * 17 * QEMU interface: 18 * + QOM property "CPUID": the value to use for the CPUID register 19 * + sysbus MMIO region 0: the system information register bank 20 */ 21 22 #ifndef HW_MISC_ARMSSE_CPUID_H 23 #define HW_MISC_ARMSSE_CPUID_H 24 25 #include "hw/sysbus.h" 26 #include "qom/object.h" 27 28 #define TYPE_ARMSSE_CPUID "armsse-cpuid" 29 typedef struct ARMSSECPUID ARMSSECPUID; 30 DECLARE_INSTANCE_CHECKER(ARMSSECPUID, ARMSSE_CPUID, 31 TYPE_ARMSSE_CPUID) 32 33 struct ARMSSECPUID { 34 /*< private >*/ 35 SysBusDevice parent_obj; 36 37 /*< public >*/ 38 MemoryRegion iomem; 39 40 /* Properties */ 41 uint32_t cpuid; 42 }; 43 44 #endif 45