1 /*
2  * ARM SSE CPU PWRCTRL register block
3  *
4  * Copyright (c) 2021 Linaro Limited
5  * Written by Peter Maydell
6  *
7  *  This program is free software; you can redistribute it and/or modify
8  *  it under the terms of the GNU General Public License version 2 or
9  *  (at your option) any later version.
10  */
11 
12 /*
13  * This is a model of the "CPU<N>_PWRCTRL block" which is part of the
14  * Arm Corstone SSE-300 Example Subsystem and documented in
15  * https://developer.arm.com/documentation/101773/0000
16  *
17  * QEMU interface:
18  *  + sysbus MMIO region 0: the register bank
19  */
20 
21 #ifndef HW_MISC_ARMSSE_CPU_PWRCTRL_H
22 #define HW_MISC_ARMSSE_CPU_PWRCTRL_H
23 
24 #include "hw/sysbus.h"
25 #include "qom/object.h"
26 
27 #define TYPE_ARMSSE_CPU_PWRCTRL "armsse-cpu-pwrctrl"
28 OBJECT_DECLARE_SIMPLE_TYPE(ARMSSECPUPwrCtrl, ARMSSE_CPU_PWRCTRL)
29 
30 struct ARMSSECPUPwrCtrl {
31     /*< private >*/
32     SysBusDevice parent_obj;
33 
34     /*< public >*/
35     MemoryRegion iomem;
36 
37     uint32_t cpupwrcfg;
38 };
39 
40 #endif
41