1 /* 2 * Coherent Processing System emulation. 3 * 4 * Copyright (c) 2016 Imagination Technologies 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License as published by the Free Software Foundation; either 9 * version 2 of the License, or (at your option) any later version. 10 * 11 * This library is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * Lesser General Public License for more details. 15 * 16 * You should have received a copy of the GNU Lesser General Public 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #ifndef MIPS_CPS_H 21 #define MIPS_CPS_H 22 23 #include "hw/sysbus.h" 24 #include "hw/misc/mips_cmgcr.h" 25 #include "hw/intc/mips_gic.h" 26 #include "hw/misc/mips_cpc.h" 27 #include "hw/misc/mips_itu.h" 28 #include "target/mips/cpu.h" 29 #include "qom/object.h" 30 31 #define TYPE_MIPS_CPS "mips-cps" 32 typedef struct MIPSCPSState MIPSCPSState; 33 DECLARE_INSTANCE_CHECKER(MIPSCPSState, MIPS_CPS, 34 TYPE_MIPS_CPS) 35 36 struct MIPSCPSState { 37 SysBusDevice parent_obj; 38 39 uint32_t num_vp; 40 uint32_t num_irq; 41 char *cpu_type; 42 43 MemoryRegion container; 44 MIPSGCRState gcr; 45 MIPSGICState gic; 46 MIPSCPCState cpc; 47 MIPSITUState itu; 48 }; 49 50 qemu_irq get_cps_irq(MIPSCPSState *cps, int pin_number); 51 52 #endif 53