xref: /openbmc/qemu/include/hw/mips/cps.h (revision a9bd9b5a)
18e7e8a5bSLeon Alrae /*
28e7e8a5bSLeon Alrae  * Coherent Processing System emulation.
38e7e8a5bSLeon Alrae  *
48e7e8a5bSLeon Alrae  * Copyright (c) 2016 Imagination Technologies
58e7e8a5bSLeon Alrae  *
68e7e8a5bSLeon Alrae  * This library is free software; you can redistribute it and/or
78e7e8a5bSLeon Alrae  * modify it under the terms of the GNU Lesser General Public
88e7e8a5bSLeon Alrae  * License as published by the Free Software Foundation; either
98e7e8a5bSLeon Alrae  * version 2 of the License, or (at your option) any later version.
108e7e8a5bSLeon Alrae  *
118e7e8a5bSLeon Alrae  * This library is distributed in the hope that it will be useful,
128e7e8a5bSLeon Alrae  * but WITHOUT ANY WARRANTY; without even the implied warranty of
138e7e8a5bSLeon Alrae  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
148e7e8a5bSLeon Alrae  * Lesser General Public License for more details.
158e7e8a5bSLeon Alrae  *
168e7e8a5bSLeon Alrae  * You should have received a copy of the GNU Lesser General Public
178e7e8a5bSLeon Alrae  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
188e7e8a5bSLeon Alrae  */
198e7e8a5bSLeon Alrae 
208e7e8a5bSLeon Alrae #ifndef MIPS_CPS_H
218e7e8a5bSLeon Alrae #define MIPS_CPS_H
228e7e8a5bSLeon Alrae 
238e7e8a5bSLeon Alrae #include "hw/sysbus.h"
24*a9bd9b5aSLeon Alrae #include "hw/misc/mips_cmgcr.h"
258e7e8a5bSLeon Alrae 
268e7e8a5bSLeon Alrae #define TYPE_MIPS_CPS "mips-cps"
278e7e8a5bSLeon Alrae #define MIPS_CPS(obj) OBJECT_CHECK(MIPSCPSState, (obj), TYPE_MIPS_CPS)
288e7e8a5bSLeon Alrae 
298e7e8a5bSLeon Alrae typedef struct MIPSCPSState {
308e7e8a5bSLeon Alrae     SysBusDevice parent_obj;
318e7e8a5bSLeon Alrae 
328e7e8a5bSLeon Alrae     uint32_t num_vp;
338e7e8a5bSLeon Alrae     uint32_t num_irq;
348e7e8a5bSLeon Alrae     char *cpu_model;
358e7e8a5bSLeon Alrae 
368e7e8a5bSLeon Alrae     MemoryRegion container;
37*a9bd9b5aSLeon Alrae     MIPSGCRState gcr;
388e7e8a5bSLeon Alrae } MIPSCPSState;
398e7e8a5bSLeon Alrae 
408e7e8a5bSLeon Alrae qemu_irq get_cps_irq(MIPSCPSState *cps, int pin_number);
418e7e8a5bSLeon Alrae 
428e7e8a5bSLeon Alrae #endif
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