1 /* 2 * IPMI base class 3 * 4 * Copyright (c) 2015 Corey Minyard, MontaVista Software, LLC 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #ifndef HW_IPMI_H 26 #define HW_IPMI_H 27 28 #include "exec/memory.h" 29 #include "qemu-common.h" 30 #include "hw/qdev.h" 31 32 #define MAX_IPMI_MSG_SIZE 300 33 34 enum ipmi_op { 35 IPMI_RESET_CHASSIS, 36 IPMI_POWEROFF_CHASSIS, 37 IPMI_POWERON_CHASSIS, 38 IPMI_POWERCYCLE_CHASSIS, 39 IPMI_PULSE_DIAG_IRQ, 40 IPMI_SHUTDOWN_VIA_ACPI_OVERTEMP, 41 IPMI_SEND_NMI 42 }; 43 44 #define IPMI_CC_INVALID_CMD 0xc1 45 #define IPMI_CC_COMMAND_INVALID_FOR_LUN 0xc2 46 #define IPMI_CC_TIMEOUT 0xc3 47 #define IPMI_CC_OUT_OF_SPACE 0xc4 48 #define IPMI_CC_INVALID_RESERVATION 0xc5 49 #define IPMI_CC_REQUEST_DATA_TRUNCATED 0xc6 50 #define IPMI_CC_REQUEST_DATA_LENGTH_INVALID 0xc7 51 #define IPMI_CC_PARM_OUT_OF_RANGE 0xc9 52 #define IPMI_CC_CANNOT_RETURN_REQ_NUM_BYTES 0xca 53 #define IPMI_CC_REQ_ENTRY_NOT_PRESENT 0xcb 54 #define IPMI_CC_INVALID_DATA_FIELD 0xcc 55 #define IPMI_CC_BMC_INIT_IN_PROGRESS 0xd2 56 #define IPMI_CC_COMMAND_NOT_SUPPORTED 0xd5 57 58 #define IPMI_NETFN_APP 0x06 59 60 #define IPMI_DEBUG 1 61 62 /* Specified in the SMBIOS spec. */ 63 #define IPMI_SMBIOS_KCS 0x01 64 #define IPMI_SMBIOS_SMIC 0x02 65 #define IPMI_SMBIOS_BT 0x03 66 #define IPMI_SMBIOS_SSIF 0x04 67 68 /* IPMI Interface types (KCS, SMIC, BT) are prefixed with this */ 69 #define TYPE_IPMI_INTERFACE_PREFIX "ipmi-interface-" 70 71 /* 72 * An IPMI Interface, the interface for talking between the target 73 * and the BMC. 74 */ 75 #define TYPE_IPMI_INTERFACE "ipmi-interface" 76 #define IPMI_INTERFACE(obj) \ 77 INTERFACE_CHECK(IPMIInterface, (obj), TYPE_IPMI_INTERFACE) 78 #define IPMI_INTERFACE_CLASS(class) \ 79 OBJECT_CLASS_CHECK(IPMIInterfaceClass, (class), TYPE_IPMI_INTERFACE) 80 #define IPMI_INTERFACE_GET_CLASS(class) \ 81 OBJECT_GET_CLASS(IPMIInterfaceClass, (class), TYPE_IPMI_INTERFACE) 82 83 typedef struct IPMIInterface { 84 Object parent; 85 } IPMIInterface; 86 87 typedef struct IPMIInterfaceClass { 88 InterfaceClass parent; 89 90 void (*init)(struct IPMIInterface *s, Error **errp); 91 92 /* 93 * Perform various operations on the hardware. If checkonly is 94 * true, it will return if the operation can be performed, but it 95 * will not do the operation. 96 */ 97 int (*do_hw_op)(struct IPMIInterface *s, enum ipmi_op op, int checkonly); 98 99 /* 100 * Enable/disable irqs on the interface when the BMC requests this. 101 */ 102 void (*set_irq_enable)(struct IPMIInterface *s, int val); 103 104 /* 105 * Handle an event that occurred on the interface, generally the. 106 * target writing to a register. 107 */ 108 void (*handle_if_event)(struct IPMIInterface *s); 109 110 /* 111 * The interfaces use this to perform certain ops 112 */ 113 void (*set_atn)(struct IPMIInterface *s, int val, int irq); 114 115 /* 116 * Got an IPMI warm/cold reset. 117 */ 118 void (*reset)(struct IPMIInterface *s, bool is_cold); 119 120 /* 121 * Handle a response from the bmc. 122 */ 123 void (*handle_rsp)(struct IPMIInterface *s, uint8_t msg_id, 124 unsigned char *rsp, unsigned int rsp_len); 125 126 /* 127 * Set by the owner to hold the backend data for the interface. 128 */ 129 void *(*get_backend_data)(struct IPMIInterface *s); 130 } IPMIInterfaceClass; 131 132 /* 133 * Define a BMC simulator (or perhaps a connection to a real BMC) 134 */ 135 #define TYPE_IPMI_BMC "ipmi-bmc" 136 #define IPMI_BMC(obj) \ 137 OBJECT_CHECK(IPMIBmc, (obj), TYPE_IPMI_BMC) 138 #define IPMI_BMC_CLASS(obj_class) \ 139 OBJECT_CLASS_CHECK(IPMIBmcClass, (obj_class), TYPE_IPMI_BMC) 140 #define IPMI_BMC_GET_CLASS(obj) \ 141 OBJECT_GET_CLASS(IPMIBmcClass, (obj), TYPE_IPMI_BMC) 142 143 typedef struct IPMIBmc { 144 DeviceState parent; 145 146 uint8_t slave_addr; 147 148 IPMIInterface *intf; 149 } IPMIBmc; 150 151 typedef struct IPMIBmcClass { 152 DeviceClass parent; 153 154 /* Called when the system resets to report to the bmc. */ 155 void (*handle_reset)(struct IPMIBmc *s); 156 157 /* 158 * Handle a command to the bmc. 159 */ 160 void (*handle_command)(struct IPMIBmc *s, 161 uint8_t *cmd, unsigned int cmd_len, 162 unsigned int max_cmd_len, 163 uint8_t msg_id); 164 } IPMIBmcClass; 165 166 /* 167 * Add a link property to obj that points to a BMC. 168 */ 169 void ipmi_bmc_find_and_link(Object *obj, Object **bmc); 170 171 /* 172 * Used for transferring information to interfaces that add 173 * entries to firmware tables. 174 */ 175 typedef struct IPMIFwInfo { 176 const char *interface_name; 177 int interface_type; 178 uint8_t ipmi_spec_major_revision; 179 uint8_t ipmi_spec_minor_revision; 180 uint8_t i2c_slave_address; 181 uint32_t uuid; 182 183 uint64_t base_address; 184 uint64_t register_length; 185 uint8_t register_spacing; 186 enum { 187 IPMI_MEMSPACE_IO, 188 IPMI_MEMSPACE_MEM32, 189 IPMI_MEMSPACE_MEM64, 190 IPMI_MEMSPACE_SMBUS 191 } memspace; 192 193 int interrupt_number; 194 enum { 195 IPMI_LEVEL_IRQ, 196 IPMI_EDGE_IRQ 197 } irq_type; 198 199 const char *acpi_parent; 200 } IPMIFwInfo; 201 202 void ipmi_add_fwinfo(IPMIFwInfo *info, Error **errp); 203 IPMIFwInfo *ipmi_first_fwinfo(void); 204 IPMIFwInfo *ipmi_next_fwinfo(IPMIFwInfo *current); 205 206 #ifdef IPMI_DEBUG 207 #define ipmi_debug(fs, ...) \ 208 fprintf(stderr, "IPMI (%s): " fs, __func__, ##__VA_ARGS__) 209 #else 210 #define ipmi_debug(fs, ...) 211 #endif 212 213 struct ipmi_sdr_header { 214 uint8_t rec_id[2]; 215 uint8_t sdr_version; /* 0x51 */ 216 uint8_t rec_type; 217 uint8_t rec_length; 218 }; 219 #define IPMI_SDR_HEADER_SIZE sizeof(struct ipmi_sdr_header) 220 221 #define ipmi_sdr_recid(sdr) ((sdr)->rec_id[0] | ((sdr)->rec_id[1] << 8)) 222 #define ipmi_sdr_length(sdr) ((sdr)->rec_length + IPMI_SDR_HEADER_SIZE) 223 224 /* 225 * 43.2 SDR Type 02h. Compact Sensor Record 226 */ 227 #define IPMI_SDR_COMPACT_TYPE 2 228 229 struct ipmi_sdr_compact { 230 struct ipmi_sdr_header header; 231 232 uint8_t sensor_owner_id; 233 uint8_t sensor_owner_lun; 234 uint8_t sensor_owner_number; /* byte 8 */ 235 uint8_t entity_id; 236 uint8_t entity_instance; 237 uint8_t sensor_init; 238 uint8_t sensor_caps; 239 uint8_t sensor_type; 240 uint8_t reading_type; 241 uint8_t assert_mask[2]; /* byte 16 */ 242 uint8_t deassert_mask[2]; 243 uint8_t discrete_mask[2]; 244 uint8_t sensor_unit1; 245 uint8_t sensor_unit2; 246 uint8_t sensor_unit3; 247 uint8_t sensor_direction[2]; /* byte 24 */ 248 uint8_t positive_threshold; 249 uint8_t negative_threshold; 250 uint8_t reserved[3]; 251 uint8_t oem; 252 uint8_t id_str_len; /* byte 32 */ 253 uint8_t id_string[16]; 254 }; 255 256 typedef uint8_t ipmi_sdr_compact_buffer[sizeof(struct ipmi_sdr_compact)]; 257 258 #endif 259