xref: /openbmc/qemu/include/hw/intc/aspeed_vic.h (revision 6f9ff551)
1 /*
2  * ASPEED Interrupt Controller (New)
3  *
4  * Andrew Jeffery <andrew@aj.id.au>
5  *
6  * Copyright 2016 IBM Corp.
7  *
8  * This code is licensed under the GPL version 2 or later.  See
9  * the COPYING file in the top-level directory.
10  *
11  * Need to add SVIC and CVIC support
12  */
13 #ifndef ASPEED_VIC_H
14 #define ASPEED_VIC_H
15 
16 #include "hw/sysbus.h"
17 #include "qom/object.h"
18 
19 #define TYPE_ASPEED_VIC "aspeed.vic"
20 typedef struct AspeedVICState AspeedVICState;
21 DECLARE_INSTANCE_CHECKER(AspeedVICState, ASPEED_VIC,
22                          TYPE_ASPEED_VIC)
23 
24 #define ASPEED_VIC_NR_IRQS 51
25 
26 struct AspeedVICState {
27     /*< private >*/
28     SysBusDevice parent_obj;
29 
30     /*< public >*/
31     MemoryRegion iomem;
32     qemu_irq irq;
33     qemu_irq fiq;
34 
35     uint64_t level;
36     uint64_t raw;
37     uint64_t select;
38     uint64_t enable;
39     uint64_t trigger;
40 
41     /* 0=edge, 1=level */
42     uint64_t sense;
43 
44     /* 0=single-edge, 1=dual-edge */
45     uint64_t dual_edge;
46 
47     /* 0=low-sensitive/falling-edge, 1=high-sensitive/rising-edge */
48     uint64_t event;
49 };
50 
51 #endif /* ASPEED_VIC_H */
52